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參數(shù)資料
| 型號(hào)： | SGB-6433 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | DC-3.5 GHz Active Bias Gain Block |
| 中文描述： | 的DC - 3.5 GHz有源偏置增益模塊 |
| 文件頁數(shù)： | 2/6頁 |
| 文件大小： | 141K |
| 代理商： | SGB-6433 |
303 South Technology Court, Broomfield, CO 80021
Phone: (800) SMI-MMIC
2
http://www.sirenza.com
EDS-103095 Rev E
S GB-6433 DC-3.5GHz Ac tive Bias Gain Bloc k
Simplified Device Schematic
16
1
4
5
8
9
12
13
15
14
2
3
11
10
6
7
Active
Bias
Absolute Maximum Ratings
Parameters
Value
Unit
Current (Ic total)
150
mA
Device Voltage (V
D
)
Power Dissipation
6.5
V
0.75
W
Operating Lead Temperature (T
L
)
RF Input Power
-40 to +85
oC
20
dBm
Storage Temperature Range
-40 to +150
oC
Operating Junction Temperature (T
J
)
Operation of this device beyond any one of these limits may
cause permanent damage. For reliable continuous operation
the device voltage and current must not exceed the maximum
operating values specified in the table on page one.
+150
oC
Bias conditions should also satisfy the following expression:
I
D
V
D
< (T
J
- T
L
) / R
TH’
j-l
Detailed Performance Table: Vcc=5V, Ic=88mA, T=25C, Z=50ohms
Symbol
Parameter
Units
100MHz
500MHz
850MHz
1950MHz
2400MHz
3500MHz
G
Small Signal Gain
dB
21.2
20.7
20.0
16.0
15.0
12.3
OIP3
Output 3rd Order Intercept Point
dBm
34.0
33.0
31.0
31.0
P1dB
Output Power at 1dB Compression
dBm
18.9
18.5
18.5
17.5
IRL
Input Return Loss
dB
43.6
33.3
25.6
15.0
13.8
9.7
ORL
Output Return Loss
dB
15.8
13.9
12.2
11.5
10.2
11.3
S12
Reverse Isolation
dB
24.4
24.6
25.0
24.4
23.8
22.5
NF
Noise Figure
dB
5.1
3.6
3.6
4.1
4.6
5.2
Pin Out Description
Pin #
Function
Description
1,2,4, 6,
7,8,11,
12,14
NC
These are no connect pins. Leave them unconnected on the PC board.
3
RFIN
RF input pin. A DC voltage should not be connected externally to this pin
5
GND
An extra ground pin that is connected to the backside exposed paddle. Connection is optional.
10
RFOUT
RF Output pin. Bias is applied to the Darlington stage thru this pin.
13
VBIAS
This pin sources the current from the active bias circuit. Connect to pin 10 thru an inductor choke.
16
VCC
This is Vcc for the active bias circuit.
Back-
side
GND
The backside exposed paddle is the main electrical GND and requires multiple vias in the PC board to GND. It
is also the main thermal path.
Caution: ESD Sensitive
Appropriate precaution in handling, packaging
and testing devices must be observed.
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相關(guān)代理商/技術(shù)參數(shù) |
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| SGB-6433Z | 制造商:SIRENZA 制造商全稱:SIRENZA 功能描述:DC-3.5 GHz Active Bias Gain Block |
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