參數(shù)資料
型號(hào): SE567
廠商: NXP Semiconductors N.V.
英文描述: Tone decoder/phase-locked loop
中文描述: 音解碼器/鎖相環(huán)
文件頁數(shù): 9/13頁
文件大?。?/td> 165K
代理商: SE567
Philips Semiconductors Linear Products
Product specification
NE/SE567
Tone decoder/phase-locked loop
April 15, 1992
411
C
2
130
f
O
F
C
3
260
f
O
F
In cases where turn-off time can be sacrificed to achieve fast
turn-on, the optional sensitivity adjustment circuit can be used to
move the quiescent C
3
voltage lower (closer to the threshold
voltage). However, sensitivity to beat frequencies, noise and
extraneous signals will be increased.
OPTIONAL CONTROLS
(Figure 3)
The 567 has been designed so that, for most applications, no
external adjustments are required. Certain applications, however,
will be greatly facilitated if full advantage is taken of the added
control possibilities available through the use of additional external
components. In the diagrams given, typical
values are suggested where applicable. For best results the
resistors used, except where noted, should have the same
temperature coefficient. Ideally, silicon diodes would be
low-resistivity types, such as forward-biased transistor base-emitter
junctions. However, ordinary low-voltage diodes should be adequate
for most applications.
DETECTION BAND — % OF f
O
Figure 6. BW Reduction
NOTE:
130
fO
10k
R
R
C2
1300
fO
10k
R
R
Adjust control for symmetry of detection band edges
about f
O
.
250
200
150
100
50
00
2
4
6
8
10
12
14
16
I
0.5k 0.9k 1.4k
1.9k
2.5k 3.2k
4.0k
10k
20k
100k
R
OPTIONAL SILICON
TEMPERATURE
PIN 2
V+
C
2
R
A
50k
R
B
R
C
R
RA
RBRC
RB
RC
SENSITIVITY ADJUSTMENT
(Figure 3)
When operated as a very narrow-band detector (less than 8
percent), both C
2
and C
3
are made quite large in order to improve
noise and out-band signal rejection. This will inevitably slow the
response time. If, however, the output stage is biased closer to the
threshold level, the turn-on time can be
improved. This is accomplished by drawing additional current to
terminal 1. Under this condition, the 567 will also give an output for
lower-level signals (10mV or lower).
By adding current to terminal 1, the output stage is biased further
away from the threshold voltage. This is most useful when, to obtain
maximum operating speed, C
2
and C
3
are made very small.
Normally, frequencies just outside the detection band could cause
false outputs under this condition. By desensitizing the output stage,
the out-band beat notes do not feed through to the output stage.
Since the input level must
Figure 7. Output Latching
NOTE:
C
A
prevents latch-up when power supply is turned on.
V+
C
3
R
L
V+
C
A
R
A
10k
567 8
1
UNLATCH
20k
R
f
V+
567 8
1
20k
C
3
R
L
R
f
UNLATCH
V+
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