參數(shù)資料
型號： SC68L198A1A
廠商： NXP SEMICONDUCTORS
元件分類： 微控制器/微處理器
英文描述： Pressure Transducer, Series 19 mm, Compensated, Pressure Range: 0 psi to 50 psi, Gage, flush mount with flange, 10 Vdc excitation
中文描述： 8 CHANNEL(S), 500K bps, SERIAL COMM CONTROLLER, PQCC84
封裝： PLASTIC, LCC-84
文件頁數(shù)： 27/49頁
文件大?。?/td> 358K
代理商： SC68L198A1A
Philips Semiconductors
Product specification
SC26C198 SC68C198
SC26L198 SC68L198
Octal UART with TTL compatibility at 3.3V
and 5V supply voltages
1995 May 1
362
clocking mechanism that will allow the pin to change synchronously
with an internal or external stimulus. See diagram below.
Table 39. GPOSR – General Purpose Output
Select Register
GPOSR selects the signal or data source for the G
OUT
0 pin. The Tx
changes.
Bits 7:4
1000 = TxC1x a
1011 = TxC16x b
1101 = GGPOR(2)
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Register
This register is a read/write register. Its contents may be altered by
a GPOR Write or by the GPOC and GPOD registers shown below.
The GPOD and GPOC may be programmed to cause the individual
bits of the GPOR to change synchronously with internal or external
events. The cells of this register may be thought of as a “Two Port
flip-flop”; one port is controlled by a D input and clock, the other by a
Bits 7:4
Bit 3
Bit 2
Reserved
GPOR(3)
GPOR(2)
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GPOR(1)
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Bit 0
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GPOR(0)
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Table 41. GPOC – General Purpose Output Clk
Register
This controls the clock source for GPOR that will clock and/or toggle
the data from the selected GPOD source. When code b’00 is
Bits 7:6
Bits 5:4
Clk Sel
01 = G
IN
0
11 = reserved
11 = reserved
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Clk Sel
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Bits 3:2
Clk Sel
01 = G
IN
0
11 = I/O3c
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Bits 1:0
Clk Sel
01 = G
IN
0
11 = I/O3a
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01 = G
IN
0
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Register
This register selects the data that will be presented to the GPOR “D”
input. Note that selection b’10 selects the inverted GPOR data as
Bits 7:6
Bits 5:4
Data Sel
01 = ’0’
11 = reserved
11 = reserved
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Data Sel
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Bits 3:2
Data Sel
01 = ’0’
11 = I/O3d
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Bits 1:0
Data Sel
01 = ’0’
11 = I/O3b
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01 = ’0’
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4:1 MULTIPLEX
“1”
“0”
NONE
1/O3a
D CLOCK
QN
D INPUT
DATA READ/WRITE
DATA IN/OUT
GPORON
DATA BUS
GPOR R/W
GPOR
GPOD
GPOSR
1/O3b
G
IN
0
G
IN
1
4:1 MULTIPLEX
GPO PIN
8:1 MULTIPLEX
TxC1Xa
TxC16Xa
RxC16Xa
TxC16Xb
GPOR(0)
GPOR(1)
GPOR(2)
GPOR(3)
SD00526
Figure 1. General Purpose Pin Control Logic
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