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| 型號(hào)： | SC16C850SVIBS |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | DRAM |
| 英文描述： | 1.8 V single UART, 20 Mbit-s (max.) with 128-byte FIFOs, infrared (IrDA), and XScale VLIO bus interface |
| 中文描述： | 128 X 8 BI-DIRECTIONAL FIFO, PDSO32 |
| 封裝： | 5 X 5 MM, 0.85 MM PITCH, ROHS COMPLIANT, MO-220, HVQFN-32 |
| 文件頁(yè)數(shù)： | 31/48頁(yè) |
| 文件大?。?/td> | 911K |
| 代理商： | SC16C850SVIBS |
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SC16C850SV
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 2 — 22 March 2011
31 of 48
NXP Semiconductors
SC16C850SV
Single UART with 128-byte FIFOs, IrDA, and XScale VLIO bus interface
[1]
For 32-byte FIFO mode, refer to
Section 7.3 “FIFO Control Register (FCR)”
.
7.17 Flow Control Trigger Level High (FLWCNTH)
This 8-bit register is used to store the receive FIFO high threshold levels to start/stop
transmission during hardware/software flow control.
Table 27
shows transmission control
register bit settings; see
Section 6.5
.
Table 27.
Bit
7:0
[1]
For 32-byte FIFO mode, refer to
Section 7.3 “FIFO Control Register (FCR)”
.
7.18 Flow Control Trigger Level Low (FLWCNTL)
This 8-bit register is used to store the receive FIFO low threshold levels to start/stop
transmission during hardware/software flow control.
Table 28
shows transmission control
register bit settings; see
Section 6.5
.
Table 28.
Bit
7:0
[1]
For 32-byte FIFO mode, refer to
Section 7.3 “FIFO Control Register (FCR)”
.
7.19 Clock prescaler (CLKPRES)
This register hold values for the clock prescaler.
Table 29.
Bit
7:4
3:0
FLWCNTH register bits description
Symbol
Description
FLWCNTH[7:0]
This register stores the programmable HIGH threshold level for
hardware and software flow control for 128-byte FIFO mode.
[1]
0x00 = trigger level is set to 1
0x01 = trigger level is set to 1
...
0x80 = trigger level is set to 128
FLWCNTL register bits description
Symbol
Description
FLWCNTL[7:0]
This register stores the programmable LOW threshold level for
hardware and software flow control for 128-byte FIFO mode.
[1]
0x00 = trigger level is set to 1
0x01 = trigger level is set to 1
...
0x80 = trigger level is set to 128
Clock prescaler register description
Symbol
Description
CLKPRES[7:4]
reserved
CLKPRES[3:0]
clock prescaler value; reset to 0
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SC16C850VIBS | 1.8 V single UART, 5 Mbit-s (max.) with 128-byte FIFOs, infrared (IrDA), and XScale VLIO bus interface |
| SC16C852LIB | 1.8 V dual UART, 5 Mbit-s (max.) with 128-byte FIFOs, infrared (IrDA) and 16 mode or 68 mode bus interface |
| SC16C852LIBS | 1.8 V dual UART, 5 Mbit-s (max.) with 128-byte FIFOs, infrared (IrDA) and 16 mode or 68 mode bus interface |
| SC16C852LIET | 1.8 V dual UART, 5 Mbit-s (max.) with 128-byte FIFOs, infrared (IrDA) and 16 mode or 68 mode bus interface |
| SC16C852SVIET | 1.8 V dual UART, 20 Mbit-s (max.) with 128-byte FIFOs, infrared (IrDA), and XScale VLIO bus interface |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SC16C850SVIBS,115 | 功能描述:UART 接口集成電路 UART 1-CH 128Byte FIFO 1.8V 32-Pin RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| SC16C850SVIBS,118 | 功能描述:UART 接口集成電路 UART 1-CH 128Byte FIFO 1.8V 32-Pin RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| SC16C850SVIBS,151 | 功能描述:UART 接口集成電路 UART 1-CH 128Byte FIFO 1.8V 32-Pin RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| SC16C850SVIBS,157 | 功能描述:UART 接口集成電路 UART 1-CH 128Byte FIFO 1.8V 32-Pin RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| SC16C850V | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:1.8 V single UART, 5 Mbit/s (max.) with 128-byte FIFOs, infrared (IrDA), and XScale VLIO bus interface |
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