參數(shù)資料
型號： SC16C750IB64
廠商： NXP SEMICONDUCTORS
元件分類： 微控制器/微處理器
英文描述： Universal Asynchronous Receiver/Transmitter (UART) with 64-byte FIFO
中文描述： 1 CHANNEL(S), 3M bps, SERIAL COMM CONTROLLER, PQFP64
封裝： 10 X 10 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT-314-2, LQFP-64
文件頁數(shù)： 21/45頁
文件大?。?/td> 598K
代理商： SC16C750IB64
Philips Semiconductors
SC16C750
UART with 64-byte FIFO
Product data
Rev. 04 — 20 June 2003
21 of 45
9397 750 11623
Koninklijke Philips Electronics N.V. 2003. All rights reserved.
7.4 Interrupt Status Register (ISR)
The SC16C750 provides six levels of prioritized interrupts to minimize external
software interaction. The Interrupt Status Register (ISR) provides the user with six
interrupt status bits. Performing a read cycle on the ISR will provide the user with the
highest pending interrupt level to be serviced. No other interrupts are acknowledged
until the pending interrupt is serviced. Whenever the interrupt status register is read,
the interrupt status is cleared. However, it should be noted that only the current
pending interrupt is cleared by the read. A lower level interrupt may be seen after
re-reading the interrupt status bits.
Table 12 “Interrupt source”
shows the data values
(bits 0-5) for the six prioritized interrupt levels and the interrupt sources associated
with each of these interrupt levels.
Table 12:
Priority
level
1
2
2
3
Interrupt source
ISR[3]
ISR[2]
ISR[1]
ISR[0]
Source of the interrupt
0
0
1
0
1
1
1
0
1
0
0
1
0
0
0
0
LSR (Receiver Line Status Register)
RXRDY (Received Data Ready)
RXRDY (Receive Data time-out)
TXRDY (Transmitter Holding Register
Empty)
MSR (Modem Status Register)
4
0
0
0
0
Table 13:
Bit
7-6
Interrupt Status Register bits description
Symbol
Description
ISR[7-6]
FIFOs enabled. These bits are set to a logic 0 when the FIFO is
not being used. They are set to a logic 1 when the FIFOs are
enabled.
Logic 0 or cleared = default condition.
ISR[5]
64-byte FIFO enable.
Logic 0 = 16-byte operation.
Logic 1 = 64-byte operation.
ISR[4]
Not used.
ISR[3-1]
INT priority bits 2-0. These bits indicate the source for a pending
interrupt at interrupt priority levels 1, 2, and 3 (see
Table 12
).
Logic 0 or cleared = default condition.
ISR[0]
INT status.
Logic 0 = An interrupt is pending and the ISR contents may be
used as a pointer to the appropriate interrupt service routine.
Logic 1 = No interrupt pending (normal default condition).
5
4
3-1
0
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
SC16C750IB64,128 功能描述:UART 接口集成電路 16C 2.5V-5V 1CH UART 64B FIFO RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel
SC16C750IB64,151 功能描述:UART 接口集成電路 16C 2.5V-5V 1CH UART 64B FIFO RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel
SC16C750IB64,157 功能描述:UART 接口集成電路 16C 2.5V-5V 1CH UART 64B FIFO RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel
SC16C751B 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:5 V, 3.3 V and 2.5 V UART with 64-byte FIFOs
SC16C751BIBS 功能描述:UART 接口集成電路 16CB 2.5-5V 3MBPS UART 64BFIFO RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel
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