參數(shù)資料
型號(hào): SC16C650BIN40
廠商: NXP SEMICONDUCTORS
元件分類: 微控制器/微處理器
英文描述: 5 V, 3.3 V and 2.5 V UART with 32-byte FIFOs and infrared (IrDA) encoder/decoder
中文描述: 1 CHANNEL(S), 3M bps, SERIAL COMM CONTROLLER, PDIP40
封裝: 0.600 INCH, PLASTIC, MO-015, SOT-129-1, DIP-40
文件頁數(shù): 7/51頁
文件大?。?/td> 881K
代理商: SC16C650BIN40
Philips Semiconductors
SC16C650B
UART with 32-byte FIFOs and IrDA encoder/decoder
Product data
Rev. 03 — 10 December 2004
7 of 51
9397 750 14451
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
CS0, CS1,
CS2
CS
14, 15,
16
-
9, 10,
11
-
-
12,
13, 14
-
I
Chip select.
When CS0 and CS1 are HIGH and CS2 is
LOW, these three inputs select the UART. When any of these
inputs are inactive, the UART remains inactive (refer to AS
description).
Clear to send.
CTS is a modem status signal. Its condition
can be checked by reading bit 4 (CTS) of the modem status
register. Bit 0 (
CTS) of the modem status register indicates
that CTS has changed states since the last read from the
modem status register. If the modem status interrupt is
enabled when CTS changes levels and the auto-CTS mode
is not enabled, an interrupt is generated. CTS is also used in
the auto-CTS mode to control the transmitter.
Data bus.
Eight data lines with 3-State outputs provide a
bi-directional path for data, control and status information
between the UART and the CPU.
Data carrier detect.
DCD is a modem status signal. Its
condition can be checked by reading bit 7 (DCD) of the
modem status register. Bit 3 (
DCD) of the modem status
register indicates that DCD has changed states since the
last read from the modem status register. If the modem
status interrupt is enabled when DCD changes levels, an
interrupt is generated.
Driver disable.
DDIS is active (LOW) when the CPU is not
reading data. When active, DDIS can disable an external
transceiver.
Data set ready.
DSR is a modem status signal. Its condition
can be checked by reading bit 5 (DSR) of the modem status
register. Bit 1 (
DSR) of the modem status register indicates
DSR has changed levels since the last read from the modem
status register. If the modem status interrupt is enabled
when DSR changes levels, an interrupt is generated.
Data terminal ready.
When active (LOW), DTR informs a
modem or data set that the UART is ready to establish
communication. DTR is placed in the active level by setting
the DTR bit of the modem control register. DTR is placed in
the inactive level either as a result of a Master Reset, during
loop mode operation, or clearing the DTR bit.
Interrupt.
When active (HIGH), INT informs the CPU that
the UART has an interrupt to be serviced. Four conditions
that cause an interrupt to be issued are: a receiver error,
received data that is available or timed out (FIFO mode
only), an empty transmitter holding register or an enabled
modem status interrupt. INT is reset (deactivated) either
when the interrupt is serviced or as a result of a Master
Reset.
7
I
CTS
40
38
25
36
I
D7-D0
9-2
4-2,
47-43
3-1, 32-28 8-1
I/O
DCD
42
40
-
38
I
DDIS
26
22
-
23
O
DSR
41
39
26
37
I
DTR
37
33
22
33
O
INT
33
30
20
30
O
Table 2:
Symbol
Pin description
…continued
Pin
PLCC44 LQFP48 HVQFN32 DIP40
Type
Description
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SC16C650BIN40,112 功能描述:UART 接口集成電路 16CB 2.5V-5V 1CH RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel
SC16C652 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Dual UART with 32 bytes of transmit and receive FIFOs
SC16C652B 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:5V, 3.3 V and 2.5V dual UART, 5 Mbit/s (max.),with 32-byte FIFOs and infrared(IrDA) encoder/decoder
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SC16C652BIB48,128 功能描述:UART 接口集成電路 16CB 2.5V-5V 2CH RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel