參數(shù)資料
型號(hào): SC16C550
廠商: NXP Semiconductors N.V.
英文描述: Universal Asynchronous Receiver/Transmitter (UART) with 16-byte FIFO and infrared (IrDA) encoder/decoder
中文描述: 通用異步接收器/發(fā)送器(UART),16字節(jié)FIFO和紅外線(IrDA)編碼器/解碼器
文件頁(yè)數(shù): 35/52頁(yè)
文件大?。?/td> 639K
代理商: SC16C550
Philips Semiconductors
SC16C550
UART with 16-byte FIFO and IrDA encoder/decoder
Product data
Rev. 05 — 19 June 2003
35 of 52
9397 750 11619
Koninklijke Philips Electronics N.V. 2003. All rights reserved.
[1]
[2]
Applies to external clock, crystal oscillator max 24 MHz.
Applicable only when AS is tied LOW.
[3]
= 333 ns (for Baudrate
max
= 1.5 Mbits/s)
= 1
μ
s (for Baudrate
max
= 460.8 kbits/s)
= 4
μ
s (for Baudrate
max
= 115.2 kbits/s)
[4]
When in
both
DMA mode 0
and
FIFO enable mode, the write cycle delay should be larger than one x
1
clock cycle.
10.1 Timing diagrams
t
28d
t
RESET
N
delay from start to reset TXRDY
Reset pulse width
baud rate divisor
-
100
1
8
-
2
16
1 1
-
40
8
-
2
16
1 1
-
40
8
-
2
16
1 R
clk
R
clk
ns
Table 27:
T
amb
=
40
°
C to +85
°
C; V
CC
= 2.5 V 3.3 V or 5.0 V
±
10%, unless otherwise specified.
Symbol
Parameter
AC electrical characteristics
…continued
Conditions
2.5 V
3.3 V
5.0 V
Unit
Min
Max
Min
Max
Min
Max
IOWstrobe
max
max
)
--------------------------------------
=
Fig 11. General read timing when using AS signal.
DATA
ACTIVE
VALID
VALID
ADDRESS
002aaa331
t
4w
t
7d
t
5s
t
7w
A0–A2
CS2
CS1–CS0
IOR, IOR
D0–D7
t
5h
t
6h
t
6s
t
8d
t
7h
t
9d
DDIS
t
11d
t
11d
ACTIVE
t
12d
t
12h
AS
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