
187
8155C–AVR–02/11
ATmega32A
20.7
Transmission Modes
The TWI can operate in one of four major modes. These are named Master Transmitter (MT),
Master Receiver (MR), Slave Transmitter (ST) and Slave Receiver (SR). Several of these
modes can be used in the same application. As an example, the TWI can use MT mode to write
data into a TWI EEPROM, MR mode to read the data back from the EEPROM. If other masters
are present in the system, some of these might transmit data to the TWI, and then SR mode
would be used. It is the application software that decides which modes are legal.
Assembly code example
C example
Comments
1
ldi
r16, (1<<TWINT)|(1<<TWSTA)|
(1<<TWEN)
out
TWCR, r16
TWCR = (1<<TWINT)|(1<<TWSTA)|
(1<<TWEN)
Send START condition
2
wait1:
in
r16,TWCR
sbrs
r16,TWINT
rjmp
wait1
while
(!(TWCR & (1<<TWINT)))
;
Wait for TWINT Flag set. This indicates
that the START condition has been
transmitted
3
in
r16,TWSR
andi
r16, 0xF8
cpi
r16, START
brne
ERROR
if
((TWSR & 0xF8) != START)
ERROR();
Check value of TWI Status Register. Mask
prescaler bits. If status different from
START go to ERROR
ldi
r16, SLA_W
out
TWDR, r16
ldi
r16, (1<<TWINT) | (1<<TWEN)
out
TWCR, r16
TWDR = SLA_W;
TWCR = (1<<TWINT) | (1<<TWEN);
Load SLA_W into TWDR Register. Clear
TWINT bit in TWCR to start transmission
of address
4
wait2:
in
r16,TWCR
sbrs
r16,TWINT
rjmp
wait2
while
(!(TWCR & (1<<TWINT)))
;
Wait for TWINT Flag set. This indicates
that the SLA+W has been transmitted,
and ACK/NACK has been received.
5
in
r16,TWSR
andi
r16, 0xF8
cpi
r16, MT_SLA_ACK
brne
ERROR
if
((TWSR & 0xF8) != MT_SLA_ACK)
ERROR();
Check value of TWI Status Register. Mask
prescaler bits. If status different from
MT_SLA_ACK go to ERROR
ldi
r16, DATA
out
TWDR, r16
ldi
r16, (1<<TWINT) | (1<<TWEN)
out
TWCR, r16
TWDR = DATA;
TWCR = (1<<TWINT) | (1<<TWEN);
Load DATA into TWDR Register. Clear
TWINT bit in TWCR to start transmission
of data
6
wait3:
in
r16,TWCR
sbrs
r16,TWINT
rjmp
wait3
while
(!(TWCR & (1<<TWINT)))
;
Wait for TWINT Flag set. This indicates
that the DATA has been transmitted, and
ACK/NACK has been received.
7
in
r16,TWSR
andi
r16, 0xF8
cpi
r16, MT_DATA_ACK
brne
ERROR
if
((TWSR & 0xF8) != MT_DATA_ACK)
ERROR();
Check value of TWI Status Register. Mask
prescaler bits. If status different from
MT_DATA_ACK go to ERROR
ldi
r16, (1<<TWINT)|(1<<TWEN)|
(1<<TWSTO)
out
TWCR, r16
TWCR = (1<<TWINT)|(1<<TWEN)|
(1<<TWSTO);
Transmit STOP condition