
C505L
Data Sheet
23
06.99
LCD
Controller
DAC0
LCON
LCRL
LCRH
DIGn
5)
D/A Conversion Register
LCD Control Register
LCD Timer Reload Low Register
LCD Timer Reload High Register
LCD Digit Register ‘n’
5)
F3DC
H
F3DD
H
F3DE
H
F3DF
H
F3En
H
F3F0
H
F3F1
H
F3F2
H
F3F3
H
F3F4
H
F3F5
H
F3F6
H
F3F7
H
F3F8
H
F3F9
H
F3FA
H
F3FB
H
F3FC
H
F3FD
H
F3FE
H
F3FF
H
00
H
00
H
00
H
00
H
00
H
00
H
00
H
00
H
00
H
00
H
00
H
00
H
00
H
00
H
00
H
00
H
00
H
00
H
00
H
00
H
00
H
6)
6)
6)
6)
5) 6)
Real-Time
Clock
RTCON
RTCR0
RTCR1
RTCR2
RTCR3
RTCR4
CLREG0
CLREG1
CLREG2
CLREG3
CLREG4
RTINT0
RTINT1
RTINT2
RTINT3
RTINT4
Real-Time Clock Control Register
Real-Time Clock Initialization Register 0
Real-Time Clock Initialization Register 1
Real-Time Clock Initialization Register 2
Real-Time Clock Initialization Register 3
Real-Time Clock Initialization Register 4
Clock Count Register 0
Clock Count Register 1
Clock Count Register 2
Clock Count Register 3
Clock Count Register 4
Real-Time Clock Interrupt Register 0
Real-Time Clock Interrupt Register 1
Real-Time Clock Interrupt Register 2
Real-Time Clock Interrupt Register 3
Real-Time Clock Interrupt Register 4
6)
6)
6)
6)
6)
6)
6)
6)
6)
6)
6)
6)
6)
6)
6)
6)
1) Bit-addressable SFRs
2) This SFR is listed repeatedly since some bits of it also belong to other functional blocks.
3) “X” means that the value is undefined and the location is reserved.
4) SFR is located in the mapped SFR area. For accessing this SFR, bit RMAP in SFR SYSCON must be set.
5) The notation “n” (n = 0 to F) in the LCD Digit Register address definition defines the number of the related
LCD digit.
6) This register is located in the on-chip external data memory area.
Table 2
Special Function Registers - Functional Blocks
(cont’d)
Block
Symbol
Name
Address
Contents after
Reset