參數(shù)資料
型號: SAB-C161S-L25M AA
廠商: Infineon Technologies
文件頁數(shù): 6/75頁
文件大小: 0K
描述: IC MICROCONTROLLER 16BIT MQFP80
標(biāo)準(zhǔn)包裝: 850
系列: C16xx
核心處理器: C166
芯體尺寸: 16-位
速度: 25MHz
連通性: EBI/EMI,SPI,UART/USART
外圍設(shè)備: POR,PWM,WDT
輸入/輸出數(shù): 63
程序存儲器類型: ROMless
RAM 容量: 2K x 8
電壓 - 電源 (Vcc/Vdd): 4.5 V ~ 5.5 V
振蕩器型: 外部
工作溫度: 0°C ~ 70°C
封裝/外殼: 80-QFP
包裝: 帶卷 (TR)
其它名稱: B161SL25MAAXT
C161SL25MAABAUMA1
C161SL25MAABXUMA1
SABC161SL25MAAXT
SP000014739
C161S
Functional Description
Data Sheet
10
V1.0, 2003-11
3
Functional Description
The architecture of the C161S combines advantages of both RISC and CISC processors
and of advanced peripheral subsystems in a very well-balanced way. In addition the on-
chip memory blocks allow the design of compact systems with maximum performance.
Figure 3 gives an overview of the different on-chip components and of the advanced,
high bandwidth internal bus structure of the C161S.
Note: All time specifications refer to a CPU clock of 20 MHz
(see definition in the AC Characteristics section).
Figure 3
Block Diagram
The program memory, the internal RAM (IRAM) and the set of generic peripherals are
connected to the CPU via separate buses. A fourth bus, the XBUS, connects external
resources as well as additional on-chip resources, the X-Peripherals (see Figure 3).
C166-Core
CPU
Po
rt
2
Interrupt Bus
XTAL
MCB04323_1S.vsd
Osc / PLL
RTC
WDT
32
16
Interrupt Controller 16-Level
Priority
PEC
External Instr. / Data
GPT
T2
T3
T4
T5
T6
SSC
BRGen
(SPI)
ASC0
BRGen
(USART)
EBC
XBUS Control
External Bus
Control
IRAM
D
ual
P
o
rt
Internal
RAM
2 Kbytes
ProgMem
Internal
ROM
Area
Data
16
Instr. / Data
Port 0
Po
rt
6
4
Port 1
16
2
16
Port 5
Port 3
12
Po
rt
4
7
Peripheral Data Bus
16
O
n
-C
hi
pX
B
U
S
(
16-B
itD
em
u
x)
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