參數(shù)資料
型號(hào)： SAA7826HL
廠商： NXP Semiconductors N.V.
元件分類(lèi)： DRAM
英文描述： CD audio decoder, digital servo and filterless DAC with integrated pre-amp and laser control
封裝： SAA7826HL/M1AS/S5<SOT315-1 (LQFP80)|<<http://www.nxp.com/packages/SOT315-1.html<1<Always Pb-free,;
文件頁(yè)數(shù)： 9/89頁(yè)
文件大小： 379K
代理商： SAA7826HL
2003 Oct 01
9
Philips Semiconductors
Product specification
CD audio decoder, digital servo and filterless
DAC with integrated pre-amp and laser control
SAA7826
7
FUNCTIONAL DESCRIPTION
7.1
Data acquisition and HF data path
The SAA7826 removes the need for an external diode signal pre-amplifier.
A simplified diagram of the HF data path is illustrated in Fig.3. The high-pass filter, equalizing filter, HF gain and adaptive
slicer are all register programmable, thus enabling the SAA7826 to be optimized for the intended application.
handbook, full pagewidth
MBL438
op-amp
comp
67.7 MHz
THRESHOLD
CONTROL
sliced
data
adaptive slicer
op-amp
op-amp
bypass
Vana
summing amplifier
equalising
filter
high-pass filter
Vref
d4_hf
d1_hf
d2_hf
hf_gain 5:0
d3_hf
Fig.3 Simplified block diagram of the HF data path and adaptive slicer.
7.2
Decoder part
7.2.1
P
RINCIPLE OPERATING MODES OF THE DECODER
The decoding part supports a full audio specification and
can operate at single-speed (n = 1), double-speed (n = 2)
and quad-speed (n = 4). The factor ‘n’ is called the
overspeed factor. A simplified data flow through the
decoder part is illustrated in Fig.7 for the M0 version and
Fig.8 for the M1 version.
7.2.2
D
ECODER SPEED AND CRYSTAL FREQUENCY
The SAA7826 is a 1
×
, 2
×
and 4
×
(three-speed) decoding
device, with an internal Phase-Locked Loop (PLL) clock
multiplier. Table 1 gives the playback speeds that are
achievable in conjunction with crystal frequency, the
mechanism and internal clock settings (selectable via
decoder register B).
7.2.3
L
OCK
-
TO
-
DISC MODE
Forelectronicshockabsorptionapplications,theSAA7826
can be put into lock-to-disc mode. This allows Constant
Angular Velocity (CAV) disc playback with varying input
data rates from the inside to the outside of the disc.
In the lock-to-disc mode, the FIFO is blocked and the
decoder will adjust its output data rate to the disc speed.
Hence, the frequency of the I
2
S-bus (WCLK and SCLK)
clocksaredependentonthedisc speed.In thelock-to-disc
mode there is a limit on the maximum variation in disc
speed that the SAA7826 will follow. Disc speeds must
always be within 25% to 100% range of their nominal
value. The lock-to-disc mode is enabled or disabled by
decoder register E.
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SAA7826HL/M1A,557 功能描述:音頻數(shù)/模轉(zhuǎn)換器 IC PHONIC AUTO RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量: 分辨率:16 bit 接口類(lèi)型:I2S, UBS 轉(zhuǎn)換速率: 信噪比:98 dB 工作電源電壓:5 V DAC 輸出端數(shù)量:2 工作溫度范圍:- 25 C to + 85 C 電源電流:23 mA 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TQFP-32 封裝:Reel
SAA7826HL/M1AS/S5, 制造商:NXP Semiconductors 功能描述:- Tape and Reel 制造商:NXP Semiconductors 功能描述:DSP
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