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參數(shù)資料
| 型號： | SAA7324 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | Digital servo processor and Compact Disc decoder with integrated DAC (CD10 II)(具有綜合數(shù)模轉(zhuǎn)換器（DAC）的數(shù)字伺服處理器和光盤譯碼器) |
| 中文描述： | 數(shù)字伺服處理器和光盤解碼器集成了援會（CD10型二）（具有綜合數(shù)模轉(zhuǎn)換器（DAC）的的數(shù)字伺服處理器和光盤譯碼器） |
| 文件頁數(shù)： | 9/68頁 |
| 文件大?。?/td> | 285K |
| 代理商： | SAA7324 |
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2000 Jun 26
9
Philips Semiconductors
Product specification
Digital servo processor and Compact Disc
decoder with integrated DAC (CD10 II)
SAA7324
7.1.3
L
OCK
-
TO
-
DISC MODE
Forelectronicshockabsorptionapplications,theSAA7324
can be put into lock-to-disc mode. This allows Constant
Angular Velocity (CAV) disc playback with varying input
data rates from the inside-to-outside of the disc.
In the lock-to-disc mode, the FIFO is blocked and the
decoder will adjust its output data rate to the disc speed.
Hence, the frequency of the I
2
S-bus (WCLK and SCLK)
clocksaredependentonthedisc speed.In thelock-to-disc
mode there is a limit on the maximum variation in disc
speed that the SAA7324 will follow. Disc speeds must
always be within 25% to 100% range of their nominal
value. The lock-to-disc mode is enabled/disabled by
decoder register E.
7.1.4
S
TANDBY MODES
The SAA7324 may be placed in two standby modes
selected by decoder register B (it should be noted that the
device core is still active):
Standby 1: CD-STOP mode; most I/O functions are
switched off
Standby 2: CD-PAUSE mode; audio output features are
switched off, but the motor loop, the motor output and
the subcode interfaces remain active; this is also called
a ‘Hot Pause’.
In the standby modes the various pins will have the
following values:
MOTO1 and MOTO2: put in high-impedance, PWM
mode (standby 1 and reset: operating in standby 2); put
in high-impedance, PDM mode (standby 1 and reset:
operating in standby 2)
SCL and SDA: no interaction; normal operation
continues
SCLK, WCLK, DATA, EF and DOBM: 3-state in both
standby modes; normal operation continues after reset
CRIN, CROUT, CL16 and CL11/4: no interaction;
normal operation continues
V1, V2/V3, V4, V5 and CFLG: no interaction; normal
operation continues.
Table 1
Playback speeds
Notes
1.
The CL11 output is always a 5.6448 MHz clock if a 16.9344 MHz external clock is used and SELPLL = 0. CL11 is
available on the CL11/4 output, enabled by programming shadow register 3 (see Section 7.15.3).
Data capture performance is not optimized for this option.
2.
REGISTER B
REGISTER E
SELPLL
CRYSTAL FREQUENCY (MHz)
CL11 FREQUENCY (MHz)
(1)
33.8688
16.9344
n = 1
n = 1
n = 2
(2)
n = 2
n = 4
(2)
n = 4
8.4672
n = 1
n = 2
n = 4
00XX
00XX
01XX
01XX
10XX
10XX
11XX
11XX
00XX
00XX
01XX
01XX
0XXX
0XXX
0XXX
0XXX
0XXX
0XXX
0XXX
0XXX
1XXX
1XXX
1XXX
1XXX
0
1
0
1
0
1
0
1
0
1
0
1
n = 1
n = 2
n = 4
(2)
11.2896
11.2896
5.6448
11.2896
11.2896
11.2896
5.6448
11.2896
11.2896
11.2896
5.6448
11.2896
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相關(guān)代理商/技術(shù)參數(shù) |
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| SAA7324H | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Digital servo processor and Compact Disc decoder with integrated DAC CD10 II |
| SAA7324H/M2B,557 | 功能描述:編碼器、解碼器、復用器和解復用器 COMPACT DISC SYSTEMS RoHS:否 制造商:Micrel 產(chǎn)品:Multiplexers 邏輯系列:CMOS 位數(shù): 線路數(shù)量（輸入/輸出）:2 / 12 傳播延遲時間:350 ps, 400 ps 電源電壓-最大:2.625 V, 3.6 V 電源電壓-最小:2.375 V, 3 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:QFN-44 封裝:Tray |
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| SAA7325 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Digital servo processor and Compact Disc decoder with integrated DAC CD10 |
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