參數(shù)資料
型號(hào)： SAA7188AWP
廠商： NXP SEMICONDUCTORS
元件分類： 顏色信號(hào)轉(zhuǎn)換
英文描述： AXIAL LEADED TUBULAR ALUMINUM RoHS Compliant: No
中文描述： COLOR SIGNAL ENCODER, PQCC68
封裝： PLASTIC, MO-047AC, SOT-188-2, LCC-68
文件頁(yè)數(shù)： 19/36頁(yè)
文件大?。?/td> 168K
代理商： SAA7188AWP
1996 Jul 08
19
Philips Semiconductors
Preliminary specification
Digital Video Encoder (DENC2-M)
SAA7188A
Table 21
Subaddress 6C
Table 22
Logic levels and function of SRCV1
Table 23
Subaddress 6D
DATA BYTE
LOGIC LEVEL
DESCRIPTION
PRCV2
0
polarity of RCV2 as output is active HIGH, rising edge is taken when input,
respectively; default after reset
polarity of RCV2 as output is active LOW, falling edge is taken when input,
respectively
pin RCV2 is switched to input; default after reset
pin RCV2 is switched to output
if ORCV2 = HIGH, pin RCV2 provides an HREF signal (Horizontal Reference Pulse
that is HIGH during active portion of line, also during vertical blanking Interval);
default after reset
1
ORCV2
0
1
0
CBLF
if ORCV2 = LOW, signal input to RCV2 is used for horizontal synchronization only
(if TRCV2 = 1); default after reset
if ORCV2 = HIGH, pin RCV2 provides a CBN signal (reference pulse that is HIGH
during active video, excluding vertical blanking interval)
1
if ORCV2 = LOW, signal input to RCV2 is used for horizontal synchronization
(if TRCV2 = 1) also as an internal blanking signal
polarity of RCV1 as output is active HIGH, rising edge is taken when input,
respectively; default after reset
polarity of RCV1 as output is active LOW, falling edge is taken when input,
respectively
pin RCV1 is switched to input; default after reset
pin RCV1 is switched to output
horizontal synchronization is taken from RCV1 port; default after reset
horizontal synchronization is taken from RCV2 port
defines signal type on pin RCV1; see Table 22
PRCV1
0
1
ORCV1
0
1
0
1
TRCV2
SRCV1
DATA BYTE
AS OUTPUT
AS INPUT
FUNCTION
SRCV11
SRCV10
0
0
1
0
1
0
VS
FS
VS
FS
Vertical Sync each field; default after reset
Frame Sync (odd/even)
Field Sequence, vertical sync every fourth field
(FISE = 1) or eighth field (FISE = 0)
not applicable
FSEQ
FSEQ
1
1
DATA BYTE
DESCRIPTION
CCEN
SRCM
enables individual line 21 encoding; see Table 24
defines signal type on pin RCM1; see Table 25
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