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參數(shù)資料
| 型號： | SAA7188AWP |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 顏色信號轉(zhuǎn)換 |
| 英文描述： | AXIAL LEADED TUBULAR ALUMINUM RoHS Compliant: No |
| 中文描述： | COLOR SIGNAL ENCODER, PQCC68 |
| 封裝： | PLASTIC, MO-047AC, SOT-188-2, LCC-68 |
| 文件頁數(shù)： | 13/36頁 |
| 文件大?。?/td> | 168K |
| 代理商： | SAA7188AWP |
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1996 Jul 08
13
Philips Semiconductors
Preliminary specification
Digital Video Encoder (DENC2-M)
SAA7188A
I
2
C-bus format
Table 5
I
2
C-bus address; see Table 6
Table 6
Explanation of Table 5
Notes
1.
2.
X is the read/write control bit; X = logic 0 is order to write; X = logic 1 is order to read, no subaddressing with read.
If more than 1 byte DATA is transmitted, then auto-increment of the subaddress is performed.
Slave receiver
Table 7
Subaddress 3A
S
SLAVE ADDRESS
ACK
SUBADDRESS
ACK
DATA 0
ACK
--------
DATA n
ACK
P
PART
DESCRIPTION
S
Slave address
ACK
Subaddress (note 2)
DATA
--------
P
START condition
1 0 0 0 1 0 0 X or 1 0 0 0 1 1 0 X (note 1)
acknowledge, generated by the slave
subaddress byte
data byte
continued data bytes and ACKs
STOP condition
DATA BYTE
LOGIC LEVEL
DESCRIPTION
MUV2C
0
1
0
1
0
1
0
1
0
1
0
1
Cb/Cr data at MP is two’s complement.
Cb/Cr data at MP is straight binary. Default after reset.
Y data at MP is two’s complement.
Y data at MP is straight binary. Default after reset.
Cb/Cr data input to VP or DP is two’s complement. Default after reset.
Cb/Cr data input to VP or DP is straight binary.
Y data input to VP is two’s complement. Default after reset.
Y data input to VP is straight binary.
Selects YUV 422 format on VP (8 lines Y) and DP (8 lines multiplexed Cb/Cr).
Selects CCIR 656 compatible format on VP (8 lines Cb, Y, Cr). Default after reset.
Data from input ports is encoded. Default after reset.
Colour bar with programmable colours (entries of OSD_LUTs) is encoded.
The LUTs are read in upward order from index 0 to index 7.
MY2C
VUV2C
VY2C
V656
CBENB
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| SAA7199 | Digital Video Encoder DENC GENLOCK-capable |
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