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參數(shù)資料
| 型號： | SAA7183A |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | Digital Video Encoder EURO-DENC2 |
| 中文描述： | 數(shù)字視頻編碼器歐元，DENC2 |
| 文件頁數(shù)： | 25/45頁 |
| 文件大?。?/td> | 203K |
| 代理商： | SAA7183A |
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1996 Oct 02
25
Philips Semiconductors
Preliminary specification
Digital Video Encoder (EURO-DENC2)
SAA7182A; SAA7183A
Table 24
Logic levels and function of SRCV1
Table 25
Subaddress 6C and 6D
Table 26
Subaddress 6D
Table 27
Subaddress 6E
Table 28
Logic levels and function of PHRES
DATA BYTE
AS OUTPUT
AS INPUT
FUNCTION
SRCV11
SRCV10
0
0
1
0
1
0
VS
FS
VS
FS
vertical sync each field; default after reset
frame sync (odd/even)
field sequence, vertical sync every fourth field
(PAL = 0), eighth field (PAL = 1) or twelfth field
(SECAM = 1)
FSEQ
FSEQ
1
1
not applicable
not applicable
DATA BYTE
DESCRIPTION
HTRIG
sets the horizontal trigger phase related to signal on RCV1 or RCV2 input
values above 1715 (FISE = 1) or 1727 (FISE = 0) are not allowed
increasing HTRIG decreases delays of all internally generated timing signals
reference mark: analog output horizontal sync (leading slope) coincides with active edge of RCV
used for triggering at HTRIG = tbf (tbf)
DATA BYTE
LOGIC LEVEL
DESCRIPTION
VTRIG
sets the vertical trigger phase related to signal on RCV1 input
increasing VTRIG decreases delays of all internally generated timing signals,
measured in half lines
variation range of VTRIG = 0 to 31 (1FH)
DATA BYTE
LOGIC LEVEL
DESCRIPTION
SBLBN
0
1
vertical blanking is defined by programming of FAL and LAL; default after reset
vertical blanking is forced in accordance with “CCIR 624”(50 Hz) or RS170A (60 Hz)
selects the phase reset mode of the colour subcarrier generator; see Table 28
field length control; see Table 29
PHRES
FLC
DATA BYTE
FUNCTION
PHRES1
PHRES0
0
0
1
1
0
1
0
1
no reset or reset via RTCI from SAA7111 if bit RTCE = 1; default after reset
reset every two lines or SECAM-specific if bit SECAM = 1
reset every eight fields
reset every four fields
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SAA7167 | YUV-to-RGB Digital-to-Analog Converter DAC |
| SAA7174 | Analog TV video and stereo decoder for computing and consumer applications in Europe |
| SAA7182A | Digital Video Encoder EURO-DENC2 |
| SAA7182 | Digital Video Encoder EURO-DENC |
| SAA7182AWP | Digital Video Encoder EURO-DENC2 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SAA7183AWP | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Digital Video Encoder EURO-DENC2 |
| SAA7183WP | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Digital Video Encoder EURO-DENC |
| SAA7184 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Digital Video Encoders DENC2-M6 |
| SAA7184WP | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Digital Video Encoders DENC2-M6 |
| SAA7185 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Digital Video Encoder DENC2 |
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