- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄372113 > SAA7134 (NXP Semiconductors N.V.) PCI audio and video broadcast decoder PDF資料下載
參數(shù)資料
| 型號： | SAA7134 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | PCI audio and video broadcast decoder |
| 中文描述： | PCI音頻和視頻廣播解碼器 |
| 文件頁數(shù)： | 10/52頁 |
| 文件大?。?/td> | 211K |
| 代理商： | SAA7134 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁當(dāng)前第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁
2002 Dec 17
10
Philips Semiconductors
Product specification
PCI audio and video broadcast decoder
SAA7134HL
6.2
Pins grouped by function
Table 2
Power supply pins
Table 3
PCI interface pins; note 1
SYMBOL
PIN
TYPE
DESCRIPTION
V
SSA
97, 108, 113
and 119
95, 110
and 115
20, 39, 55,
64, 74, 93
and 128
1, 19, 38, 54,
65, 73
and 92
AG
analog ground for integrated analog signal processing
V
DDA
AS
analog supply voltage for integrated analog signal processing
V
SSD
VG
digital ground for digital circuit, core and I/Os
V
DDD
VS
digital supply voltage for digital circuit, core and I/Os
SYMBOL
PIN
TYPE
DESCRIPTION
PCI_CLK
PCI_RST#
AD[31] to
AD[00]
40
127
PI
PI
PIOand
T/S
PCI clock input: reference for all bus transactions, up to 33.33 MHz
PCI reset input: will 3-state all PCI pins (active LOW)
multiplexed address and data input or output: bi-directional, 3-state
4 to 11,
14 to 18,
21 to 23,
34 to 37,
41 to 44 and
46 to 53
12, 24, 33
and 45
32
C/BE[3]# to
C/BE[0]#
PAR
PIOand
T/S
PIOand
T/S
PIOand
S/T/S
PIOand
S/T/S
PIOand
S/T/S
PIOand
S/T/S
PI
command code input or output: indicates type of requested transaction and
byte enable, for byte aligned transactions (active LOW)
parity input or output: driven by the data source, even parity over all pins AD
and C/BE#
frame input or output: driven by the current bus master (owner), to indicate
the beginning and duration of a bus transaction (active LOW)
target ready input or output: driven by the addressed target, to indicate
readiness for requested transaction (active LOW)
initiator ready input or output: driven by the initiator, to indicate readiness to
continue transaction (active LOW)
stop input or output: target is requesting the master to stop the current
transaction (active LOW)
initialization device select input: this input is used to select the SAA7134HL
during configuration read and write transactions
device select input or output: driven by the target device, to acknowledge
address decoding (active LOW)
PCI request output: the SAA7134HL requests master access to PCI-bus
(active LOW)
PCI grant input: the SAA7134HL is granted to master access PCI-bus
(active LOW)
FRAME#
25
TRDY#
27
IRDY#
26
STOP#
29
IDSEL
13
DEVSEL#
28
PIOand
S/T/S
PO
REQ#
3
GNT#
2
PI
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SAA7135 | Single-chip, analog TV video/stereo DECODER |
| SAA7139 | The Digital Video Decoder/Encoder Modules(數(shù)字視頻譯碼器/編碼器模塊) |
| SAA7138 | The Digital Video Decoder/Encoder Modules(數(shù)字視頻譯碼器/編碼器模塊) |
| SAA7140A | High Performance Scaler HPS |
| SAA7140B | High Performance Scaler HPS |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SAA7134HL | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:PCI audio and video broadcast decoder |
| SAA7134HL/V1,518 | 功能描述:視頻 IC PCI 9-BIT VID/STEREO RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel |
| SAA7134HL/V1,557 | 功能描述:視頻 IC PCI 9-BIT VID/STEREO RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel |
| SAA7134HLBE | 功能描述:視頻 IC PCI 9-BIT VID/STEREO DECODER RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel |
| SAA7134HLBE-T | 功能描述:視頻 IC PCI 9-BIT VID/STEREO DECODER RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。