2004 Mar 16
180
Philips Semiconductors
Product specification
PC-CODEC
SAA7108E; SAA7109E
Table 210
Task handling control; register set A [90H[2:0]] and B [C0H[2:0]]; note 1
Note
1.
X = don’t care.
18.2.5.6
Subaddresses 91H to 93H
Table 211
X port formats and configuration; register set A [91H[7:3]] and B [C1H[7:3]]; note 1
Note
1.
X = don’t care.
EVENT HANDLER CONTROL
CONTROL BITS 2 TO 0
RPTSK
STRC1
STRC0
Event handler triggers immediately after finishing a task
Event handler triggers with next V-sync
Event handler triggers with field ID = 0
Event handler triggers with field ID = 1
If active task is finished, handling is taken over by the next task
Active task is repeated once, before handling is taken over by the next task
X
X
X
X
0
1
0
0
1
1
X
X
0
1
0
1
X
X
SCALER INPUT FORMAT AND CONFIGURATION SOURCE
SELECTION
CONTROL BITS 7 TO 3
CONLV
HLDFV
SCSRC1 SCSRC0
SCRQE
Only if XRQT[83H[2]] = 1: scaler input source reacts on
SAA7108E; SAA7109E request
Scaler input source is a continuous data stream, which cannot
be interrupted (must be logic 1 if SAA7108E; SAA7109E
decoder part is source of scaler or XRQT[83H[2]] = 0)
Scaler input source is data from decoder, data type is
provided according to Table 44
Scaler input source is Y-C
B
-C
R
data from X port
Scaler input source is raw digital CVBS from selected analog
channel, for backward compatibility only, further use is not
recommended
Scaler input source is raw digital CVBS (or 16-bit Y + C
B
-C
R
, if
no 16-bit output are active) from X port
SAV/EAV code bits 6 and 5 (F and V) may change between
SAV and EAV
SAV/EAV code bits 6 and 5 (F and V) are synchronized to
scalers output line start
SAV/EAV code bit 5 (V) and V gate on pin IGPV as generated
by the internal processing; see Fig.44
SAV/EAV code bit 5 (V) and V gate are inverted
X
X
X
X
0
X
X
X
X
1
X
X
0
0
X
X
X
X
X
0
1
1
0
X
X
X
X
1
1
X
X
0
X
X
X
X
1
X
X
X
0
X
X
X
X
1
X
X
X
X