參數(shù)資料
型號(hào): SAA7103H
廠(chǎng)商: NXP SEMICONDUCTORS
元件分類(lèi): 顏色信號(hào)轉(zhuǎn)換
英文描述: Circular Connector; MIL SPEC:MIL-C-5015; Body Material:Metal; Series:GT; No. of Contacts:48; Connector Shell Size:36; Connecting Termination:Solder; Circular Shell Style:Straight Plug; Body Style:Straight
中文描述: COLOR SIGNAL ENCODER, PQFP44
封裝: 10 X 10 MM, 1.75 MM HEIGHT, PLASTIC, SOT-307-2, QFP-44
文件頁(yè)數(shù): 43/76頁(yè)
文件大小: 289K
代理商: SAA7103H
2001 Sep 25
43
Philips Semiconductors
Product specification
Digital video encoder
SAA7102; SAA7103
Table 42
Subaddress 1BH
Table 43
Subaddresses 26H and 27H
Table 44
Subaddress 28H
Table 45
Subaddress 29H
DATA BYTE
LOGIC
LEVEL
DESCRIPTION
MSM
0
1
0
1
0
1
0
1
monitor sense mode off; RCOMP, GCOMP and BCOMP bits are not valid; default after reset
monitor sense mode on
check comparator at DAC on pin 27 is active, output is loaded
check comparator at DAC on pin 27 is inactive, output is not loaded
check comparator at DAC on pin 28 is active, output is loaded
check comparator at DAC on pin 28 is inactive, output is not loaded
check comparator at DAC on pin 30 is active, output is loaded
check comparator at DAC on pin 30 is inactive, output is not loaded
RCOMP
(read only)
GCOMP
(read only)
BCOMP
(read only)
DATA BYTE
LOGIC
LEVEL
DESCRIPTION
WSS
wide screen signalling bits
3 to 0 = aspect ratio
7 to 4 = enhanced services
10 to 8 = subtitles
13 to 11 = reserved
wide screen signalling output is disabled; default after reset
wide screen signalling output is enabled
WSSON
0
1
DATA BYTE
LOGIC
LEVEL
DESCRIPTION
REMARKS
BS
starting point of burst in clock cycles
PAL: BS = 33 (21H); default after reset if
strapping pin 13 tied to HIGH
NTSC: BS = 25 (19H); default after reset if
strapping pin 13 tied to LOW
DATA BYTE
LOGIC
LEVEL
DESCRIPTION
REMARKS
SRES
0
1
pin 23 accepts a teletext bit stream (TTX)
pin 23 accepts a sync reset input (SRES)
default after reset
a HIGH impulse resets synchronization of the
encoder (first field, first line)
PAL: BE = 29 (1DH); default after reset if
strapping pin 13 tied to HIGH
NTSC: BE = 29 (1DH); default after reset if
strapping pin 13 tied to LOW
BE
ending point of burst in clock cycles
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