參數(shù)資料
型號(hào)： SAA6750
廠商： NXP Semiconductors N.V.
英文描述： Encoder for MPEG2 image recording EMPIRE
中文描述： 為MPEG2編碼器帝國(guó)的形象記錄
文件頁(yè)數(shù)： 18/60頁(yè)
文件大小： 217K
代理商： SAA6750
2000 May 03
18
Philips Semiconductors
Product specification
Encoder for MPEG2 image recording
(EMPIRE)
SAA6750H
7.3.3.2
Interface definition
The data input interface uses in total 11 pins. Pins YUV0 to YUV7 carry video and synchronization data and 3 pins are
reserved for control purposes (see Table 4).
Table 4
List of pins data input port
Note
1.
In ITU-T 656 mode sync signals are embedded in the video data input stream. The external sync signals are not
used.
7.3.3.3
Line based processing
The line based processing works the same way for PAL and NTSC signals.
Each of the three components of the video signals Y, U and V are filtered horizontally. The filter is symmetrical and has
seven taps. The seven taps are weighted with three programmable parameters a1, a2 and a3 as shown in Table 5.
Table 5
Horizontal filtering
The three parameters must be loaded by setting the I
2
C-bus control register words A1, A2 and A3. The valid range is
0 to 255. Reset state is 0.
To convert the video signal from 4 : 2 : 2 to 4 : 2 : 0 format, vertical filtering and subsampling of the chrominance
components has to be performed. The vertical filter has six taps. The filter coefficients are given in Table 6.
Table 6
Vertical filtering
As mentioned, optionally an SIF mode conversion of PAL or NTSC standard input signals may be activated by setting
the I
2
C-bus control bit SS (see Tables 3 and 22). To convert the video signal to SIF resolution the bottom fields are
discarded. Furthermore, all components of the video signal are horizontally subsampled by factor two.
PIN NAME
PIN TYPE
DESCRIPTION
YUV0 to YUV7
FID
HSYNC
VSYNC
input
input
input
input
video input signal (synchronous to VCLK)
odd/even field identification signal; note 1
horizontal synchronization signal; note 1
vertical synchronization signal; note 1
TAP
3
a3
2
a2
1
a1
0
+1
+2
+3
Horizontal filtering f(a1, a2 and a3)
1
2(a1 + a2 + a3)
a1
a2
a3
TAP
1
3
4
2
3
4
5
6
4
3
Vertical filtering top fields
Vertical filtering bottom fields
+13
+4
+30
+24
+24
+30
+4
+13
相關(guān)PDF資料
PDF描述
SAA6750H Encoder for MPEG2 image recording EMPIRE
SAA6752HS MPEG-2 video and MPEG-audio/AC-3 audio encoder with multiplexer
SAA7102 Circular Connector; MIL SPEC:MIL-C-5015; Body Material:Metal; Series:GT; No. of Contacts:12; Connector Shell Size:28; Connecting Termination:Solder; Circular Shell Style:Straight Plug; Body Style:Straight
SAA7102E Digital video encoder
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
SAA6750H 制造商:PHILIPS 制造商全稱(chēng):NXP Semiconductors 功能描述:Encoder for MPEG2 image recording EMPIRE
SAA6752HS 制造商:PHILIPS 制造商全稱(chēng):NXP Semiconductors 功能描述:MPEG-2 video and MPEG-audio/AC-3 audio encoder with multiplexer
SAA6752HS/V103 制造商:PHILIPS 制造商全稱(chēng):NXP Semiconductors 功能描述:MPEG-2 video and MPEG-audio/AC-3 audio encoder with multiplexer
SAA6752HS/V103,557 功能描述:IC AUD/VID ENCODER MPEG 208-SQFP RoHS:是 類(lèi)別:集成電路 (IC) >> 接口 - 編碼器，解碼器，轉(zhuǎn)換器 系列:- 產(chǎn)品變化通告:Development Systems Discontinuation 26/Apr/2011 標(biāo)準(zhǔn)包裝:1 系列:- 類(lèi)型:編碼器 應(yīng)用:DVB-S.2 系統(tǒng) 電壓 - 電源，模擬:- 電壓 - 電源，數(shù)字:- 安裝類(lèi)型:- 封裝/外殼:模塊 供應(yīng)商設(shè)備封裝:模塊 包裝:散裝 其它名稱(chēng):Q4645799
SAA6752HS/V104 制造商:PHILIPS 制造商全稱(chēng):NXP Semiconductors 功能描述:MPEG-2 video and MPEG-audio/AC-3 audio encoder with multiplexer
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