參數(shù)資料
型號(hào)： SAA5497PS/NNN
廠商： NXP SEMICONDUCTORS
元件分類： 微控制器/微處理器
英文描述： 8-BIT, MROM, 12 MHz, MICROCONTROLLER, PDIP52
封裝： 0.600 INCH, PLASTIC, SDIP-52
文件頁(yè)數(shù)： 13/72頁(yè)
文件大?。?/td> 498K
代理商： SAA5497PS/NNN
1998 Dec 14
20
Philips Semiconductors
Preliminary specication
Economy teletext and TV microcontrollers
SAA5x9x family
7.4.2
SPECIAL FUNCTION REGISTERS
Table 11 SFRs bit description
REGISTER
FUNCTION
Interrupt Enable Register (IE)
EA
disable all interrupts (logic 0) or use individual interrupt enable bits (logic 1)
ES1
bit I2C-bus interrupt enable (logic 1)
ES2
byte I2C-bus interrupt enable (logic 1)
ET1
enable timer 1 overow interrupt (logic 1)
EX1
enable external interrupt 1 (logic 1)
ET0
enable timer 0 overow interrupt (logic 1)
EX0
enable external interrupt 0 (logic 1)
Power Control Register (PCON)
ARD
AUX-RAM disable bit. Disables the 512 bytes of internal AUX-RAM (logic 1);
all MOVX-instructions access the external data memory
GF1
general purpose ag 1
GF0
general purpose ag 0
Program Status Word (PSW)
CY
carry ag
AC
auxiliary carry ag
F0
ag 0
RS1,RS0
register bank select control bits
OV
overow ag
P
parity ag
6-bit Pulse Width Modulator Control Registers (PWM0 to PWM7)
PWE
activate this PWM and take control of respective port pin (logic 1)
PV5 to PV0
binary value sets high time of PWM output
Serial Interface Slave Address Register (S1ADR); note 1
ADR6 to ADR0
I2C-bus slave address to which the device will respond
GC
enables response to the I2C-bus general call address
Serial Interface Control Register (S1CON); note 1
CR2 to CR0
clock rate bits
ENSI
I2C-bus interface enable
STA
start condition ag
STO
stop condition ag
SI
interrupt ag
AA
assert acknowledge ag
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