參數(shù)資料
型號(hào): SAA5360HL
廠商: NXP SEMICONDUCTORS
元件分類: 圖文
英文描述: Multi page intelligent teletext decoder
中文描述: TELETEXT DECODER, PQFP100
封裝: 14 X 14 MM, 1.40 MM HEIGHT, PLASTIC, SOT-407-1, MS-026, LQFP-100
文件頁數(shù): 22/28頁
文件大?。?/td> 158K
代理商: SAA5360HL
2005 Mar 09
22
Philips Semiconductors
Product specification
Multi page intelligent teletext decoder
SAA5360; SAA5361
12.3
Application notes
Ports AD0 to AD7 of the microcontroller can be connected
to pins D0 to D7 of the SRAM in any order.
For the addressing, the lower group of address lines
(A0 to A8) and the upper group of address lines
(A9 to A14, A15_BK, RAMBK0 and RAMBK1) may be
connectedinanyorderwithinthegroups,providedthat the
full 256 kbytes of external SRAM is used.
Fig.5 shows the application diagram of the SAA5361 with
external SRAM connections.
When using an external SRAM smaller than 256 kbytes,
the relevant number of bits from the microcontroller
addressbusshouldbedisconnected,alwaysremovingthe
most significant bits first.
For power saving modes, it might be advisable to control
the CE pin of the SRAM module(s) using one of the
microcontroller ports to de-select the SRAM.
12.3.1
E
XTERNAL DATA MEMORY ACCESS
Table 4
External data memory access (see Fig.6 and
Fig.7)
Note
1.
The timings are only valid for the nominal 12 MHz
clock provided to the microcontroller.
12.3.2
S
YMBOL EXPLANATIONS
Eachtimingsymbolhasfivecharacters.Thefirstcharacter
is always ‘t’ (time). Depending on their positions, the other
characters indicate the name of a signal or the logical
status of that signal.
The designations are:
A = Address
C = Clock
D = Input data
H = Logic level HIGH
I = Instruction (program memory contents)
L = Logic level LOW, or ALE
P = PSEN
Q = Output data
R = RD signal
t = Time
V = Valid
W = WR signal
X = No longer a valid logic level
Z = Float
Examples:
t
AVLL
= time for address valid to ALE LOW.
t
LLPL
= time for ALE to PSEN LOW.
SYMBOL
PARAMETER
TYPICAL
(1)
UNIT
t
RLRH
t
WLWH
t
RLDV
t
RHDX
t
RHDZ
t
LLWL
RD pulse width
WR pulse width
RD LOW to valid data in 198
Data hold after RD
Data float after RD
ALE LOW to RD or
WR LOW
Address valid to WR
LOW or RD LOW
Data valid to WR LOW
Data hold after WR
RD LOW to address
float
RD or WR HIGH to
ALE HIGH
250
250
ns
ns
ns
ns
ns
ns
0
tbd
132
t
AVWL
172
ns
t
QVWX
t
WHQX
t
RLAZ
89
15
tbd
ns
ns
ns
t
WHLH
40
ns
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