參數資料
型號: SAA5284
廠商: NXP Semiconductors N.V.
英文描述: Multimedia video data acquisition circuit
中文描述: 多媒體視頻數據采集電路
文件頁數: 15/24頁
文件大?。?/td> 159K
代理商: SAA5284
1998 Feb 05
15
Philips Semiconductors
Objective specification
Multimedia video data acquisition circuit
SAA5284
Fig.6 Motorola mode interface read cycle timing.
(1) Event A occurs when LDS + CS0 + CS1 = 0 (boolean).
(2) Event B occurs when LDS + CS0 + CS1 = 1 (boolean).
handbook, full pagewidth
MGK148
D7 to D0
A2 to A0
LDS
A
(1)
B
(2)
DTACK
t1
t2
t6
t4
t5
t3
t7
t0
valid address
valid data
3-state
3-state
R/W
CS1 or CS0
Table 6
Motorola-mode interface read cycle timing (12 MHz clock)
SYMBOL
DESCRIPTION
MIN.
MAX.
UNIT
t
0
t
1
t
2
t
3
t
4
t
5
t
6
t
7
minimum cycle time
address set-up time before event A
address hold time after event B
data hold time from event B
data settling time
data valid to DTACK LOW
LDS HIGH to DTACK HIGH
delay between cycles
333
0
0
0
88
83
83
83
833
712
170
212
ns
ns
ns
ns
ns
ns
ns
ns
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