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參數(shù)資料
| 型號： | SAA5250P |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 消費家電 |
| 英文描述： | Interface for data acquisition and control for multi-standard teletext systems |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, PDIP40 |
| 封裝： | 0.600 INCH, PLASTIC, DIP-40 |
| 文件頁數(shù)： | 12/35頁 |
| 文件大?。?/td> | 173K |
| 代理商： | SAA5250P |
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January 1987
12
Philips Semiconductors
Product specification
Interface for data acquisition and control
(for multi-standard teletext systems)
SAA5250
Operation
The CIDAC uses the same clock signal for data acquisition and internal processing, this allows the CIDAC to have a write
and a read cycle during each character period (see Fig.13). The first half of the character period is a write cycle and the
second half is a read cycle. Consequently, for an 8 MHz bit rate the maximum memory cycle time is 500 ns.
When the first data byte is written into the FIFO memory, thus transferred into the read register, the FIFO memory enters
the status shown in Table 12.
Table 12
FIFO status
When the FIFO memory is full two events occur:
the write address register points to the next address after the last written address
when new data is to be written, the memory select signal output ceases
Memory interface
The memory interface contains all the buffers for the memory signals mentioned in the section ‘FIFO memory controller’.
Page detection
This part of the CIDAC contains a parallel register with logic which detects (only in fast mode) a start of a page or data
group (see section ‘R0 register’).
Hamming correction
(see Tables 13 and 14)
The Hamming correction provides (see section ‘Prefix processing’):
hexadecimal value of the Hamming code
accept/reject code signal
parity information
DB2 TO DB0
DB2 = 1
memory empty
DB1 = 0
data available
DB0 = 0
memory not full
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SAA5250T | Interface for data acquisition and control for multi-standard teletext systems |
| SAA5252 | Line twenty-one acquisition and display LITOD |
| SAA5252P | Line twenty-one acquisition and display LITOD |
| SAA5252T | Line twenty-one acquisition and display LITOD |
| SAA5254 | Integrated VIP and teletext decoder IVT1.1X |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SAA5250T | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Interface for data acquisition and control for multi-standard teletext systems |
| SAA5252 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Line twenty-one acquisition and display LITOD |
| SAA5252P | 制造商:NXP Semiconductors 功能描述:TELETEXT DECODER, PDIP24 |
| SAA5252T | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Line twenty-one acquisition and display LITOD |
| SAA5254 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Integrated VIP and teletext decoder IVT1.1X |
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