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參數(shù)資料
| 型號： | SAA5250P |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 消費(fèi)家電 |
| 英文描述： | Interface for data acquisition and control for multi-standard teletext systems |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, PDIP40 |
| 封裝： | 0.600 INCH, PLASTIC, DIP-40 |
| 文件頁數(shù)： | 11/35頁 |
| 文件大?。?/td> | 173K |
| 代理商： | SAA5250P |
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January 1987
11
Philips Semiconductors
Product specification
Interface for data acquisition and control
(for multi-standard teletext systems)
SAA5250
Fifo status register (read R0 register)
Table 11
Fifo register contents
Once the relevant prefix and the right working modes have been given by the corresponding registers, a write command
to the R6 register enables the CIDAC to accept and process serial data.
Channel comparator
This is a four bit comparator which compares the three user hexadecimal defined values in R1 and R2 to corresponding
bytes of the prefix coming from the Hamming corrector. If the three bytes match, the internal process of the prefix
continues. If they do not match the CIDAC returns to a wait state until the next broadcast data package is received.
FIFO memory controller
The FIFO memory contains all the necessary functions required for the control of the 11-bit address memory (2 K byte).
The functions contained in the FIFO memory are as follows:
write address register (11-bits)
read address register (11-bits)
memory pointer (11-bits)
address multiplexer (11-bits)
write data register (8-bits)
read data register (8-bits)
data multiplexer
control logic
The FIFO memory provides the memory interface with the following:
11-bit address bus (A10 to A0)
8-bit data bus (D7 to D0)
two control signals, memory select (MS) and write enable (WE)
DB2 TO DB0
DB2 = 1
memory empty
DB1 = 1, data not present in the
read data register
DB0 = 0
memory not full
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SAA5250T | Interface for data acquisition and control for multi-standard teletext systems |
| SAA5252 | Line twenty-one acquisition and display LITOD |
| SAA5252P | Line twenty-one acquisition and display LITOD |
| SAA5252T | Line twenty-one acquisition and display LITOD |
| SAA5254 | Integrated VIP and teletext decoder IVT1.1X |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SAA5250T | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Interface for data acquisition and control for multi-standard teletext systems |
| SAA5252 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Line twenty-one acquisition and display LITOD |
| SAA5252P | 制造商:NXP Semiconductors 功能描述:TELETEXT DECODER, PDIP24 |
| SAA5252T | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Line twenty-one acquisition and display LITOD |
| SAA5254 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Integrated VIP and teletext decoder IVT1.1X |
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