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參數(shù)資料
| 型號(hào)： | SAA4993H |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 消費(fèi)家電 |
| 英文描述： | Field and line rate converter with noise reduction |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP160 |
| 封裝： | 28 X 28 MM, 3.40 MM HEIGHT, PLASTIC, MS-022, SOT-322-2, QFP-160 |
| 文件頁數(shù)： | 30/40頁 |
| 文件大?。?/td> | 148K |
| 代理商： | SAA4993H |
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2
3
P
P
F
w
S
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Notes
1.
2.
3.
S means semi static, used at initialization or mode changes; F means field frequent, in general updated in each display field.
Selectable items are marked bold.
Almost all of the R(ead) and W(rite) registers of SAA4993H are double buffered. The Write registers are latched by a signal called New_field.
New_field gets set, when RE_F rises after RSTR (New_field is effectively at the start of active video). The Read registers are latched by a signal
called Reg_upd. Reg_upd gets set, when half the number of active pixels of the fourth line of vertical blanking have entered the SAA4993H
(Reg_upd will effectively be active 3
1
2
lines after the RE_A, RE_C and RE_E have ended). The only exception are the registers which are not
double buffered, these are as follows:
a) Write register 025H: power_on_reset
b) Write register 02FH, bit 1: CndSet
c) Read register 0B0H to 0BFH, 0AEH and 0AFH: pan_zoom_vectors, including FalconIdent (= 0), StatusJump0 and StatusJump1.
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| SAA4998H | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Field and line rate converter with noise reduction and embedded memory |
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