
1997 Jun 10
4
Philips Semiconductors
Preliminary specification
LIne MEmory noise Reduction IC
(LIMERIC)
SAA4945H
PINNING
SYMBOL
PIN
TYPE
DESCRIPTION
Y
O7
SNDA
SNCL
VRST
V
DD1
GND1
Y
I7
Y
I6
Y
I5
Y
I4
Y
I3
Y
I2
Y
I1
Y
I0
U
I1
U
I0
V
I1
V
I0
CLK
GND2
WE
I
Va
GND3
TST2
TST1
TST0
GND4
GND5
V
DD2
V
DD3
WE
O
GND6
n.c.
V
O0
V
O1
U
O0
U
O1
Y
O0
Y
O1
Y
O2
1
2
3
4
5
6
7
8
9
output
input/output
input
input
supply
ground
input
input
input
input
input
input
input
input
input
input
input
input
input
ground
input
input
ground
input
input
input
ground
ground
supply
supply
output
ground
output
output
output
output
output
output
output
luminance output bit 7
data from interface SNERT bus
clock from interface SNERT bus
reset in the vertical blanking interval
supply voltage 1
ground 1
luminance input bit 7 from analog-to-digital converter
luminance input bit 6 from analog-to-digital converter
luminance input bit 5 from analog-to-digital converter
luminance input bit 4 from analog-to-digital converter
luminance input bit 3 from analog-to-digital converter
luminance input bit 2 from analog-to-digital converter
luminance input bit 1 from analog-to-digital converter
luminance input bit 0 from analog-to-digital converter
U input bit 1 from analog-to-digital converter
U input bit 0 from analog-to-digital converter
V input bit 1 from analog-to-digital converter
V input bit 0 from analog-to-digital converter
master clock
ground 2
write enable input
vertical blanking pulse
ground 3
test pin 2
test pin 1
test pin 0
ground 4
ground 5
supply voltage 2
supply voltage 3
write enable output
ground 6
not connected
V output bit 0
V output bit 1
U output bit 0
U output bit 1
luminance output bit 0
luminance output bit 1
luminance output bit 2
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40