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參數(shù)資料
| 型號： | SA8027 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | 2.5 GHz low voltage, low power RF fractional-N/IF integer frequency synthesizer |
| 中文描述： | 2.5 GHz的低電壓，射頻fractional-N/IF整數(shù)頻率合成器的低功耗 |
| 文件頁數(shù)： | 11/22頁 |
| 文件大小： | 231K |
| 代理商： | SA8027 |
Philips Semiconductors
Product data
SA8027
2.5 GHz low voltage, low power
RF fractional-N/IF integer frequency synthesizer
2001 Aug 21
11
1.7
The PHP and PHI charge pumps are driven by the main phase
detector, while the PHA charge pump is driven by the auxiliary
phase detector. The I
SET
value (refer to Table 1) is determined by
the external resistor attached to the R
SET
pin.
Charge Pumps
The charge pump, by default, will automatically go into speed-up
mode (which can deliver up to 15*I
SET
for PHP_SU, and 36*I
SET
for
PHI), based on the strobe pulse width following the A word, to
reduce switching speed for large tuning voltage steps (i.e., large
frequency steps). Figure 10 shows the recommended passive loop
filter configuration. Note: This charge pump architecture eliminates
the need for added active switches and reduces external component
count. Furthermore, the programmable charge pump gains provide
some programmability to the loop filter bandwidth.
The duration of speed-up mode is determined by the strobe pulse
width following the A word. Recommended optimal strobe width is
equal to the total loop filter capacitance charge time from state 1 to
state 2. The strobe width must not exceed this charge time. The
strobe width is controlled by the CPU (
×
number of clock cycles).
In addition, charge pumps will stay in speed-up mode continuously
while Tspu = 1 (in D word). The speed-up mode can also be
disabled by programming T
dis-spu
= 1 (in D word).
SR02356
VCO
C3
C2
R2
C1
R1
PHP[PHP–SU]
PHI
Figure 10.
Typical passive 3-pole loop filter
Table 1. Main and auxiliary charge pump currents
CP1
CP0
I
PHA
I
PHP
I
PHP–SU
I
PHI
0
0
1.5xl
SET
3xI
SET
15xl
SET
36xl
SET
0
1
0.5xl
SET
1xl
SET
5xl
SET
12xl
SET
1
0
1.5xl
SET
3xl
SET
15xl
SET
0
1
1
0.5xl
SET
1xl
SET
5xl
SET
0
NOTES:
1. I
SET
= V
SET
/R
SET
: bias current for charge pumps.
2. CP1 is used to disable the PHI pump, I
PHP–SU
is the total current
at pin PHP during speed up condition.
1.8
The output LOCK maintains a logic ‘1’ when the auxiliary phase
detector (AND/ORed) with the main phase detector indicates a lock
condition. The lock condition for the main and auxiliary synthesizers
is defined as a phase difference of less than
frequency at the input REF
in+, –
. One counter can fulfill the lock
condition when the other counter is powered down. Out of lock
(logic ‘0’) is indicated when both counters are powered down.
Lock Detect
1 period of the
1.9
The power-down signal can be either hardware (PON) or software
(PD). The PON signal is exclusively ORed with the PD bits in
B-word. If PON = 0, then the part is powered up when PD = 1. PON
can be used to invert the polarity of the software bit PD. When the
synthesizer is reactivated after power-down, the main and reference
dividers are synchronized to avoid possibility of random phase
errors on power-up.
Power-down mode
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| SA8027DH | 功能描述:鎖相環(huán) - PLL DUAL FRACTIONAL N SYNTHESIZER RoHS:否 制造商:Silicon Labs 類型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray |
| SA8027DH,512 | 功能描述:射頻無線雜項 DUAL FRACTIONAL N RoHS:否 制造商:Texas Instruments 工作頻率:112 kHz to 205 kHz 電源電壓-最大:3.6 V 電源電壓-最小:3 V 電源電流:8 mA 最大功率耗散: 工作溫度范圍:- 40 C to + 110 C 封裝 / 箱體:VQFN-48 封裝:Reel |
| SA8027DH,518 | 功能描述:鎖相環(huán) - PLL DUAL FRACTIONAL N RoHS:否 制造商:Silicon Labs 類型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray |
| SA8027DH-T | 功能描述:鎖相環(huán) - PLL DUAL FRACTIONAL N SYNTHESIZER RoHS:否 制造商:Silicon Labs 類型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray |
| SA8027W | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:2.5 GHz low voltage, low power RF fractional-N/IF integer frequency synthesizer |
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