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參數(shù)資料
| 型號： | SA8025ADK |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | XO, clock |
| 英文描述： | Low-voltage 1.8GHz fractional-N synthesizer |
| 中文描述： | PLL FREQUENCY SYNTHESIZER, 1800 MHz, PDSO20 |
| 文件頁數(shù)： | 10/23頁 |
| 文件大小： | 456K |
| 代理商： | SA8025ADK |
Philips Semiconductors
Product specification
SA8025A
1.8GHz low-voltage Fractional-N synthesizer
1996 Oct 15
10
if PA = “1”: N = NA; with NA = 4 to 4095
Reference Divider
The input signal on REF_IN is amplified to logic level by a
single-ended CMOS input buffer, which accepts low level AC
coupled input signals. This input stage is enabled by the OR
function of the serial input bits EA and EM. Disabling means that all
currents in the input stage are switched off. The reference divider
consists of a programmable divider by NR (NR = 4 to 4095) followed
by a three bit binary counter. The 2 bit SM register (see Figure 7)
determines which of the 4 output pulses is selected as the main
phase detector input. The 2 bit SA register determines the selection
of the auxiliary phase detector signal.
Main Divider
The differential inputs are amplified (to internal ECL logic levels) and
provide excellent sensitivity (–20dBm at 1.7GHz) making the
prescaler ideally suited to directly interface to a VCO as integrated
on the Philips front-end devices including RF gain stage, VCO and
mixer. The internal four modulus prescaler feedback loop FB
controls the selection of the divide by ratios 64/65/68/73, and
reduces the minimum system division ratio below the typical value
required by standard dual modulus (64/65) devices.
This input stage is enabled when serial control bit EM = “1”.
Disabling means that all currents in the prescaler are switched off.
The main divider is built up by a 12 bit counter plus a sign bit.
Depending on the serial input values NM1, NM2, NM3, NM4 and the
prescaler select PR, the counter will select a prescaler ratio during a
number of input cycles according to Table 2 and Table 3.
The loading of the work registers NM1, NM2, NM3, NM4 and PR is
synchronized with the state of the main counter, to avoid extra
phase disturbance when switching over to another main divider ratio
as explained in the Serial Input Programming section.
At the completion of a main divider cycle, a main divider output
pulse is generated which will drive the main phase comparator.
Also, the fractional accumulator is incremented with NF. The
accumulator works modulo Q. Q is preset by the serial control bit
FMOD to 8 when FMOD = “1”. Each time the accumulator
overflows, the feedback to the prescaler will select one cycle using
prescaler ratio R2 instead of R1.
As shown above, this will increase the overall division ratio by 1 if
R2 = R1 + 1. The mean division ratio over Q main divider will then
be
NF
Q
Programming a fraction means the prescaler with main divider will
divide by N or N + 1. The output of the main divider will be
modulated with a fractional phase ripple. This phase ripple is
proportional to the contents of the fractional accumulator FRD,
which is used for fractional current compensation.
NQ
N
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SA8026 | 2.5GHz low voltage fractional-N dual frequency synthesizer |
| SA8026DH | ECONOLINE: RB & RA - Dual Output from a Single Input Rail- Power Sharing on Output- Industry Standard Pinout- 1kVDC & 2kVDC Isolation- Custom Solutions Available- UL94V-0 Package Material- Efficiency to 85% |
| SA8027 | 2.5 GHz low voltage, low power RF fractional-N/IF integer frequency synthesizer |
| SA8027DH | 2.5 GHz low voltage, low power RF fractional-N/IF integer frequency synthesizer |
| SA8027W | 2.5 GHz low voltage, low power RF fractional-N/IF integer frequency synthesizer |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SA8026 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:2.5GHz low voltage fractional-N dual frequency synthesizer |
| SA8026DH | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:2.5GHz low voltage fractional-N dual frequency synthesizer |
| SA8027 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:2.5 GHz low voltage, low power RF fractional-N/IF integer frequency synthesizer |
| SA8027DH | 功能描述:鎖相環(huán) - PLL DUAL FRACTIONAL N SYNTHESIZER RoHS:否 制造商:Silicon Labs 類型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray |
| SA8027DH,512 | 功能描述:射頻無線雜項 DUAL FRACTIONAL N RoHS:否 制造商:Texas Instruments 工作頻率:112 kHz to 205 kHz 電源電壓-最大:3.6 V 電源電壓-最小:3 V 電源電流:8 mA 最大功率耗散: 工作溫度范圍:- 40 C to + 110 C 封裝 / 箱體:VQFN-48 封裝:Reel |
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