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參數(shù)資料
| 型號： | S71WS512N80BFEZZ2 |
| 廠商： | Spansion Inc. |
| 英文描述： | Stacked Multi-Chip Product (MCP) Flash Memory and pSRAM CMOS 1.8 Volt |
| 中文描述： | 堆疊式多芯片產(chǎn)品（MCP）的閃存和移動(dòng)存儲(chǔ)芯片的CMOS 1.8伏特 |
| 文件頁數(shù)： | 34/142頁 |
| 文件大小： | 1996K |
| 代理商： | S71WS512N80BFEZZ2 |
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34
S29WSxxxN MirrorBit Flash Family For Multi-chip Products (MCP)
S71WS512NE0BFWZZ_00_ A1 June 28, 2004
A d v a n c e I n f o r m a t i o n
Lock Register
The Lock Register consists of 4 bits. The Customer SecSi Sector Protection Bit is
DQ0, Persistent Protection Mode Lock Bit is DQ1, Password Protection Mode Lock
Bit is DQ2, and Persistent Sector Protection OTP Bit is DQ3. Each of these bits are
non-volatile. DQ15-DQ4 are reserved and will be 1’s.
Hardware Data Protection Mode
The device offers two types of data protection at the sector level:
When WP# is at V
IL
, the four outermost sectors are locked (device specific).
When ACC is at V
IL
, all sectors are locked.
The write protect pin (WP#) adds a final level of hardware program and erase
protection to the outermost boot sectors. The outermost boot sectors are the sec-
tors containing both the lower and upper set of outermost sectors in a dual-boot-
configured device.
When this pin is low it is not possible to change the con-
tents of these outermost sectors.
These sectors generally hold system boot
code. So, the WP# pin can prevent any changes to the boot code that could over-
ride the choices made while setting up sector protection during system
initialization.
The following hardware data protection measures prevent accidental erasure or
programming, which might otherwise be caused by spurious system level signals
during V
CC
power-up and power-down transitions, or from system noise.
Write Protect (WP#)
The Write Protect feature provides a hardware method of protecting the four out-
ermost sectors. This function is provided by the WP# pin and overrides the
previously discussed Sector Protection/Unprotection method.
If the system asserts V
IL
on the WP# pin, the device disables program and erase
functions in the “outermost” boot sectors. The outermost boot sectors are the
sectors containing both the lower and upper set of sectors in a dual-boot-config-
ured device.
If the system asserts V
IH
on the WP# pin, the device reverts to whether the boot
sectors were last set to be protected or unprotected. That is, sector protection or
unprotection for these sectors depends on whether they were last protected or
unprotected.
Note that the WP# pin must not be left floating or unconnected; inconsistent be-
havior of the device may result. The WP# pin must be held stable during a
command sequence execution.
Low V
CC
Write Inhibit
When V
CC
is less than V
LKO
, the device does not accept any write cycles. This pro-
tects data during V
CC
power-up and power-down. The command register and all
internal program/erase circuits are disabled, and the device resets to reading
array data. Subsequent writes are ignored until V
CC
is greater than V
LKO
. The sys-
tem must provide the proper signals to the control inputs to prevent unintentional
writes when V
CC
is greater than V
LKO
.
Table 6. Lock Register
DQ15-3
DQ2
DQ1
DQ0
1’s
Password Protection
Mode Lock Bit
Persistent Protection
Mode Lock Bit
Customer SecSi
Sector Protection Bit
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| S71WS512N80BFEZZ3 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-Chip Product (MCP) Flash Memory and pSRAM CMOS 1.8 Volt |
| S71WS512N80BFIZZ0 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-Chip Product (MCP) Flash Memory and pSRAM CMOS 1.8 Volt |
| S71WS512N80BFIZZ2 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-Chip Product (MCP) Flash Memory and pSRAM CMOS 1.8 Volt |
| S71WS512N80BFIZZ3 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-Chip Product (MCP) Flash Memory and pSRAM CMOS 1.8 Volt |
| S71WS512N80BFWZZ0 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-Chip Product (MCP) Flash Memory and pSRAM CMOS 1.8 Volt |
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