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參數(shù)資料
| 型號(hào)： | S71WS512N80BAEZZ3 |
| 廠商： | Spansion Inc. |
| 英文描述： | Stacked Multi-Chip Product (MCP) Flash Memory and pSRAM CMOS 1.8 Volt |
| 中文描述： | 堆疊式多芯片產(chǎn)品（MCP）的閃存和移動(dòng)存儲(chǔ)芯片的CMOS 1.8伏特 |
| 文件頁(yè)數(shù)： | 28/142頁(yè) |
| 文件大?。?/td> | 1996K |
| 代理商： | S71WS512N80BAEZZ3 |
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28
S29WSxxxN MirrorBit Flash Family For Multi-chip Products (MCP)
S71WS512NE0BFWZZ_00_ A1 June 28, 2004
A d v a n c e I n f o r m a t i o n
Any other address/data write combinations will abort the Write Buffer Program-
ming operation. The device will then “go busy.” The Data Bar polling techniques
should be used while monitoring the
last address location loaded into the
write buffer
. This eliminates the need to store an address in memory because
the system can load the last address location, issue the program confirm com-
mand at the last loaded address location, and then data bar poll at that same
address. DQ7, DQ6, DQ5, DQ2, and DQ1 should be monitored to determine the
device status during Write Buffer Programming.
The write-buffer “embedded” programming operation can be suspended using
the standard suspend/resume commands. Upon successful completion of the
Write Buffer Programming operation, the device will return to READ mode.
The Write Buffer Programming Sequence is ABORTED under any of the following
conditions:
Load a value that is greater than the page buffer size during the “Number of
Locations to Program” step.
Write to an address in a sector different than the one specified during the
“Write-Buffer-Load” command.
Write an Address/Data pair to a different write-buffer-page than the one se-
lected by the “Starting Address” during the “write buffer data loading” stage
of the operation.
Write data other than the “Confirm Command” after the specified number of
“data load” cycles.
The ABORT condition is indicated by DQ1 = 1, DQ7 = DATA# (for the “l(fā)ast ad-
dress location loaded”), DQ6 = TOGGLE, DQ5 = 0. This indicates that the Write
Buffer Programming Operation was ABORTED. A “Write-to-Buffer-Abort reset”
command sequence is required when using the Write-Buffer-Programming fea-
tures in Unlock Bypass mode. Note that the SecSI
TM
sector, autoselect, and CFI
functions are unavailable when a program operation is in progress.
Write buffer programming is allowed in any sequence of memory (or address) lo-
cations. These flash devices are capable of handling multiple write buffer
programming operations on the same write buffer address range without inter-
vening erases. However, programming the same word address multiple times
without intervening erases requires a modified programming method. Please con-
tact your local Spansion
TM
representative for details.
Use of the write buffer is strongly recommended for programming when multiple
words are to be programmed. Write buffer programming is approximately eight
times faster than programming one word at a time.
Autoselect Mode
The autoselect mode provides manufacturer and device identification, and sector
protection verification, through identifier codes output from the internal register
(separate from the memory array) on DQ15–DQ0. This mode is primarily in-
tended for programming equipment to automatically match a device to be
programmed with its corresponding programming algorithm. The autoselect
codes can also be accessed in-system.
When verifying sector protection, the sector address must appear on the appro-
priate highest order address bits (see
Table 12
). The remaining address bits are
don’t care. When all necessary bits have been set as required, the programming
equipment may then read the corresponding identifier code on DQ15–DQ0. The
autoselect codes can also be accessed in-system through the command register.
The command sequence is illustrated in the "
Command Definition Summary
" sec-
相關(guān)PDF資料 |
PDF描述 |
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| S71WS512N80BAIZZ0 | Stacked Multi-Chip Product (MCP) Flash Memory and pSRAM CMOS 1.8 Volt |
| S71WS512N80BAIZZ2 | Stacked Multi-Chip Product (MCP) Flash Memory and pSRAM CMOS 1.8 Volt |
| S71WS512N80BAIZZ3 | Stacked Multi-Chip Product (MCP) Flash Memory and pSRAM CMOS 1.8 Volt |
| S71WS512N80BAWZZ0 | Stacked Multi-Chip Product (MCP) Flash Memory and pSRAM CMOS 1.8 Volt |
| S71WS512N80BAWZZ2 | Stacked Multi-Chip Product (MCP) Flash Memory and pSRAM CMOS 1.8 Volt |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| S71WS512N80BAIZZ0 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-Chip Product (MCP) Flash Memory and pSRAM CMOS 1.8 Volt |
| S71WS512N80BAIZZ2 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-Chip Product (MCP) Flash Memory and pSRAM CMOS 1.8 Volt |
| S71WS512N80BAIZZ3 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-Chip Product (MCP) Flash Memory and pSRAM CMOS 1.8 Volt |
| S71WS512N80BAWZZ0 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-Chip Product (MCP) Flash Memory and pSRAM CMOS 1.8 Volt |
| S71WS512N80BAWZZ2 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-Chip Product (MCP) Flash Memory and pSRAM CMOS 1.8 Volt |
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