參數(shù)資料
型號(hào)： S71PL129JA0BAW9U0
廠商： Spansion Inc.
英文描述： Stacked Multi-Chip Product (MCP) Flash Memory
中文描述： 堆疊式多芯片產(chǎn)品（MCP）的快閃記憶體
文件頁(yè)數(shù)： 5/149頁(yè)
文件大?。?/td> 2693K
代理商： S71PL129JA0BAW9U0
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)當(dāng)前第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)第115頁(yè)第116頁(yè)第117頁(yè)第118頁(yè)第119頁(yè)第120頁(yè)第121頁(yè)第122頁(yè)第123頁(yè)第124頁(yè)第125頁(yè)第126頁(yè)第127頁(yè)第128頁(yè)第129頁(yè)第130頁(yè)第131頁(yè)第132頁(yè)第133頁(yè)第134頁(yè)第135頁(yè)第136頁(yè)第137頁(yè)第138頁(yè)第139頁(yè)第140頁(yè)第141頁(yè)第142頁(yè)第143頁(yè)第144頁(yè)第145頁(yè)第146頁(yè)第147頁(yè)第148頁(yè)第149頁(yè)
December 23, 2004 S71PL129Jxx_00_A5
5
A d v a n c e I n f o r m a t i o n
DC and Operating Characteristics . . . . . . . . . . . 121
Common ...............................................................................................................121
16M pSRAM .........................................................................................................122
32M pSRAM ........................................................................................................122
64M pSRAM ........................................................................................................123
128M pSRAM .......................................................................................................123
AC Operating Conditions . . . . . . . . . . . . . . . . . 124
Test Conditions (Test Load and Test Input/Output Reference) .......124
Figure 45. Output Load ..................................................... 124
Timing Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . 126
Read Timings ......................................................................................................126
Figure 46. Timing Waveform of Read Cycle(1)...................... 126
Figure 47. Timing Waveform of Read Cycle(2)...................... 126
Figure 48. Timing Waveform of Page Cycle (Page Mode Only) 127
Write Timings ....................................................................................................127
Figure 49. Write Cycle #1 (WE# Controlled) ........................ 127
Figure 50. Write Cycle #2 (CS1# Controlled) ....................... 128
Figure 51. Timing Waveform of Write Cycle(3)
(CS2 Controlled) .............................................................. 128
Figure 52. Timing Waveform of Write Cycle(4) (UB#, LB#
Controlled) ...................................................................... 129
pSRAM Type 7
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 130
Pin Description . . . . . . . . . . . . . . . . . . . . . . . . . . 130
Functional Description . . . . . . . . . . . . . . . . . . . . . 131
Power Down (for 32M, 64M Only) . . . . . . . . . . . . 131
Power Down .......................................................................................................131
Power Down Program Sequence .................................................................132
Address Key .......................................................................................................132
Absolute Maximum Ratings . . . . . . . . . . . . . . . . . 133
Package Capacitance . . . . . . . . . . . . . . . . . . . . . . 133
DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . 134
AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . 135
Read Operation ..................................................................................................135
Write Operation ...............................................................................................136
Power Down Parameters ...............................................................................137
Other Timing Parameters ...............................................................................137
AC Test Conditions .........................................................................................138
AC Measurement Output Load Circuits ...................................................138
Figure 53. AC Output Load Circuit – 16 Mb.......................... 138
Figure 54. AC Output Load Circuit – 32 Mb and 64 Mb.......... 138
Timing Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . 139
Read Timings .......................................................................................................139
Figure 55. Read Timing #1 (Basic Timing) .......................... 139
Figure 56. Read Timing #2 (OE# Address Access................. 139
Figure 57. Read Timing #3 (LB#/UB# Byte Access) ............. 140
Figure 58. Read Timing #4 (Page Address Access after CE1#
Control Access for 32M and 64M Only) ............................... 140
Figure 59. Read Timing #5 (Random and Page Address Access for
32M and 64M Only) ......................................................... 141
Write Timings ......................................................................................................141
Figure 60. Write Timing #1 (Basic Timing) .......................... 141
Figure 61. Write Timing #2 (WE# Control).......................... 142
Figure 62. Write Timing #3-1
(WE#/LB#/UB# Byte Write Control) .................................. 142
Figure 63. Write Timing #3-3
(WE#/LB#/UB# Byte Write Control) .................................. 143
Figure 64. Write Timing #3-4
(WE#/LB#/UB# Byte Write Control) .................................. 143
Read/Write Timings ..........................................................................................144
Figure 65. Read/Write Timing #1-1 (CE1# Control) ............. 144
Figure 66. Read / Write Timing #1-2
(CE1#/WE#/OE# Control) ................................................ 144
Figure 67. Read / Write Timing #2 (OE#, WE# Control) ....... 145
Figure 68. Read / Write Timing #3
(OE#, WE#, LB#, UB# Control) ........................................ 145
Figure 69. Power-up Timing #1 ......................................... 146
Figure 70. Power-up Timing #2 ......................................... 146
Figure 71. Power Down Entry and Exit Timing ..................... 146
Figure 72. Standby Entry Timing after Read or Write............ 147
Figure 73. Power Down Program Timing (for 32M/64M Only) . 147
Revision Summary
相關(guān)PDF資料
PDF描述
S71PL129JC0BAW9U2 Stacked Multi-Chip Product (MCP) Flash Memory
S71PL129JA0 FAN MOTOR IMP 101.6X55MM 48V TTL
S71PL129JA0BAI9Z2 Stacked Multi-Chip Product (MCP) Flash Memory
S71PL129JA0BAI9Z3 Stacked Multi-Chip Product (MCP) Flash Memory
S71PL129JA0BAW9Z2 Stacked Multi-Chip Product (MCP) Flash Memory
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
S71PL129JA0BAW9U2 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-Chip Product (MCP) Flash Memory
S71PL129JA0BAW9U3 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-Chip Product (MCP) Flash Memory
S71PL129JA0BAW9Z0 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-Chip Product (MCP) Flash Memory
S71PL129JA0BAW9Z2 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-Chip Product (MCP) Flash Memory
S71PL129JA0BAW9Z3 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-Chip Product (MCP) Flash Memory
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*