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參數(shù)資料
| 型號： | S71NS064NB0BJWVT2 |
| 廠商： | Spansion Inc. |
| 英文描述： | MirrorBit 1.8 Volt-only Simultaneous Read/Write, Burst-mode Multiplexed Flash Memory |
| 中文描述： | 1.8伏的MirrorBit只同步讀/寫，突發(fā)模式復(fù)用閃存 |
| 文件頁數(shù)： | 5/12頁 |
| 文件大小： | 261K |
| 代理商： | S71NS064NB0BJWVT2 |
October 10, 2006 S71NS-N_00_A3
S71NS-N MCP Products
3
A d v a n c e I n f o r m a t i o n
2
Input/Output Descriptions
Table 2.1
identifies the input and output package connections provided on the device.
Table 2.1
Input/Output Descriptions
Symbol
Description
Flash
X
X
X
X
X
X
RAM
X
X
X
X
X
X
AMAX – A16
ADQ15 – ADQ0
OE#
WE#
V
SS
NC
Address inputs
Multiplexed Address/Data
Output Enable input. Asynchronous relative to CLK for the Burst mode.
Write Enable input.
Ground
No Connect; not connected internally
Ready output. Indicates the status of the Burst read. The WAIT# pin of the
pSRAM is tied to RDY.
Clock input. In burst mode, after the initial word is output, subsequent
active edges of CLK increment the internal address counter. Should be at
V
IL
or V
IH
while in asynchronous mode
Address Valid input. Indicates to device that the valid address is present
on the address inputs.
Low = for asynchronous mode, indicates valid address; for burst mode,
causes starting address to be latched.
High = device ignores address inputs
Hardware reset input. Low = device resets and returns to reading array
data
Hardware write protect input. At V
, disables program and erase functions
in the four outermost sectors. Should be at V
IH
for all other conditions.
Accelerated input. At V
, accelerates programming; automatically places
device in unlock bypass mode. At V
, disables all program and erase
functions. Should be at V
IH
for all other conditions.
Chip-enable input for pSRAM.
Chip-enable input for Flash. Asynchronous relative to CLK for Burst Mode.
Control Register Enable (pSRAM).
Flash 1.8 Volt-only single power supply.
pSRAM Power Supply.
Upper Byte Control (pSRAM).
Lower Byte Control (pSRAM)
Do Not Use
RDY
X
X
CLK
X
X
AVD#
X
X
F-RST#
X
F-WP#
X
F-ACC
X
R-CE1#
F-CE#
R-CRE
F-VCC
R-VCC
R-UB#
R-LB#
DNU
X
X
X
X
X
X
X
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| S71NS064NB0BJWVT3 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:MirrorBit 1.8 Volt-only Simultaneous Read/Write, Burst-mode Multiplexed Flash Memory |
| S71NS064NC0BJWRN0 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:MirrorBit 1.8 Volt-only Simultaneous Read/Write, Burst-mode Multiplexed Flash Memory |
| S71NS064NC0BJWRN2 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:MirrorBit 1.8 Volt-only Simultaneous Read/Write, Burst-mode Multiplexed Flash Memory |
| S71NS064NC0BJWRN3 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:MirrorBit 1.8 Volt-only Simultaneous Read/Write, Burst-mode Multiplexed Flash Memory |
| S71NS064NC0BJWRT0 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:MirrorBit 1.8 Volt-only Simultaneous Read/Write, Burst-mode Multiplexed Flash Memory |
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