參數(shù)資料
型號: S71GL128NC0BAWAZ0
廠商: SPANSION LLC
元件分類: 存儲器
英文描述: SPECIALTY MEMORY CIRCUIT, PBGA84
封裝: 8 X 11.60 MM, 1.20 MM HEIGHT, LEAD FREE COMPLIANT, FBGA-84
文件頁數(shù): 92/122頁
文件大小: 1764K
代理商: S71GL128NC0BAWAZ0
December 15, 2004 S29GLxxxN_MCP_A1
S29GLxxxN MirrorBitTM Flash Family
71
Ad vance
Info rmat i o n
be at VHH for operations other than accelerated programming, or device damage
may result. WP# has an internal pullup; when unconnected, WP# is at VIH.
Figure 2 illustrates the algorithm for the program operation. Refer to the Erase
and Program Operations–“AC Characteristics” section for parameters, and Figure
14 for timing diagrams.
Figure 1. Write Buffer Programming Operation
Write “Write to Buffer”
command and
Sector Address
Write number of addresses
to program minus 1(WC = 31)
and Sector Address
Write program buffer to
flash sector address
Write first address/data
Write to a different
sector address
FAIL or ABORT
PASS
Read DQ15 - DQ0 at
Last Loaded Address
Read DQ15 - DQ0 with
address = Last Loaded
Address
Write next address/data pair
WC = WC - 1
WC = 0 ?
Part of “Write to Buffer”
Command Sequence
Yes
No
Abort Write to
Buffer Operation?
DQ7 = Data?
DQ5 = 1?
DQ1 = 1?
Write to buffer ABORTED.
Must write “Write-to-buffer
Abort Reset” command
sequence to return
to read mode.
Notes:
1. When Sector Address is specified, any
address in the selected sector is acceptable.
However, when loading Write-Buffer
address locations with data, all addresses
must fall within the selected Write-Buffer
Page.
2. DQ7 may change simultaneously with DQ5.
Therefore, DQ7 should be verified.
3. If this flowchart location was reached
because DQ5= “1”, then the device FAILED.
If this flowchart location was reached
because DQ1= “1”, then the Write to Buffer
operation was ABORTED. In either case, the
proper reset command must be written
before the device can begin another
operation. If DQ1=1, write the Write-
Buffer-Programming-Abort-Reset
command. if DQ5=1, write the Reset
command.
4. See Table 12 for command sequences
required for write buffer programming.
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