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參數(shù)資料
| 型號： | S6C1104 |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 6 BIT 384 CHANNEL RSDS TFT-LCD SOURCE DRIVER |
| 中文描述： | 6位384通道區(qū)特別職務隊的TFT - LCD源驅(qū)動 |
| 文件頁數(shù)： | 5/20頁 |
| 文件大?。?/td> | 228K |
| 代理商： | S6C1104 |
6 BIT 384 CHANNEL RSDS SOURCE DRIVER
S6C1104
5
PIN DESCRIPTIONS
Symbol
Pin Name
Description
VDD1
Logic power supply
2.7 to 3.6 V
VDD2
Driver power supply
7.0 to 12.0 V
VSS1
Logic ground
Ground (0 V)
VSS2
Driver ground
Ground (0 V)
Y1 to Y384
Driver outputs
The D/A converted 64 gray-scale analog voltage is output.
D0P<0:2>
D0N<0:2>
D1P<0:2>
D1N<0:2>
D2P<0:2>
D2N<0:2>
RSDS data input
Total data lines consist of 18 data bus.
(6-bit digital, 3 colors(R, G, B) and 2 differential input pairs)
The 3-bit differential input pairs generate the internal 6-bit data through
the comparison between DxxP and DxxN.
SHL
Shift direction control
input
This pin controls the direction of shift register in cascade connection.
When SHL=H: DIO1 input, Y1
→
Y384, DIO2 output
When SHL=L: DIO2 input, Y384
→
Y1, DIO1 output
SHL=H: Used as the start pulse input pin.
SHL=L: Used as the start pulse output pin.
DIO1
Start pulse input/output
DIO2
Start pulse input/output
SHL=H: Used as the start pulse output pin.
SHL=L: Used as the start pulse input pin.
DATPOL
Data inversion input
DATPOL= L: No inversion
DATPOL= H: Data polarity inversion
( DATPOL must be fixed VSS1 or VDD1.)
POL
Polarity input
POL=H: The reference voltage for odd number outputs are VGMA1 to
VGMA5 and those for even number outputs are VGMA6 to VGMA10.
POL=L: The reference voltage for odd number outputs are VGMA6 to
VGMA10 and those for even number outputs are VGMA1 to VGMA5.
CLKP
CLKN
RSDS shift clock input
The RSDS clock input pairs generate the internal shift clock, CLK2,
through the comparison between CLKP and CLKN.
CLK1
Latch input
S6C1104 clears 128 shift registers at the rising edge of CLK1 and
outputs the analog data to the each channel at the falling edge.
VGMA1
to VGMA10
Gamma corrected power
supplies
Input the gamma corrected power supplies from external source.
VDD2>VGMA1>VGMA2>
……
>VGMA9>VGMA10>VSS2
Keep power supplies unchanged during the gray-scale voltage output.
TESTI1/O1,
TESTI2/O2
Amp test input/output
These pins are used for Amp test.
TESTI1(=TESTI2)=L : Normal operation mode
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