
Appendix A Electrical Characteristics
MC9S12XF - Family Reference Manual, Rev.1.19
1210
Freescale Semiconductor
A.4
Voltage Regulator
A.5
Output Loads
A.5.1
Resistive Loads
The voltage regulator is intended to supply the internal logic and oscillator. It allows no external DC loads.
A.5.2
Capacitive Loads
The capacitive loads are specied in
Table A-19. Ceramic capacitors with X7R dielectricum are required.
Table A-18. Voltage Regulator Electrical Characteristics
Conditions are shown in
Table A-4 unless otherwise noted
Num
C
Characteristic
Symbol
Min
Typical
Max
Unit
1
P
Input Voltages
VVDDR,A
3.13
—
5.5
V
2P
Output Voltage Core
Full Performance Mode
Reduced Power Mode (MCU STOP mode)
Shutdown Mode
VDD
1.72
—
1.84
1.6
—(1)
1. Voltage Regulator Disabled. High Impedance Output
1.98
—
V
3P
Output Voltage Flash
Full Performance Mode
Reduced Power Mode (MCU STOP mode)
Shutdown Mode
VDDF
2.6
—
2.82
2.2
2.9
—
V
4P
Output Voltage PLL
Full Performance Mode
Reduced Power Mode (MCU STOP mode)
Shutdown Mode
VDDPLL
1.72
—
1.84
1.6
1.98
—
V
5P
Low Voltage Interrupt Asser Level (2)
Low Voltage InterruptDeassert Level
2. Monitors VDDA, active only in Full Performance Mode. Indicates I/O & ADC performance degradation due to low supply
voltage.
VLVIA
VLVID
4.04
4.19
4.23
4.38
4.40
4.49
V
6P
VDDX Low Voltage Reset Deassert (3) (4)
3. Device functionality is guaranteed on power down to the LVR assert level
4. Monitors VDDX, active only in Full Performance Mode. MCU is monitored by the POR in RPM (see
Figure A-3)
VLVRXD
—
3.13
V
7C
Trimmed API internal clock(5)
f / fnominal
5. The API Trimming bits must be set that the minimum period equals to 0.2 ms.
dfAPI
- 5%
—
+ 5%
—
8D
The first period after enabling the counter by APIFE
might be reduced by API start up delay
tsdel
—
100
us
9
T
Temperature Sensor Slope
dVTS
5.05
5.25
5.45
mV/oC
10
T
High Temperature Interrupt Assert
(VREGHTTR=$88)(6)
High Temperature Interrupt Deassert
(VREGHTTR=$88)
6. A hysteresis is guaranteed by design
THTIA
THTID
120
110
132
122
144
134
oC