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參數(shù)資料
| 型號(hào)： | S3C880AXX-AQ |
| 元件分類(lèi)： | 微控制器/微處理器 |
| 英文描述： | MROM, 8 MHz, MICROCONTROLLER, PDIP42 |
| 封裝： | 0.600 INCH, SDIP-42 |
| 文件頁(yè)數(shù)： | 146/242頁(yè) |
| 文件大小： | 1313K |
| 代理商： | S3C880AXX-AQ |
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ADDRESS SPACES
S3C880A/F880A
2-14
REGISTER SET 1
The term set 1 refers to the upper 64 bytes of the register file, locations C0H–FFH. This area can be accessed at
any time, regardless of which page is currently selected. The upper 32-byte area of this 64-byte space is divided
into two 32-byte register banks, called bank 0 and bank 1. You use the select register bank instructions, SB0 or
SB1, to address one bank or the other. A reset operation automatically selects bank 0 addressing.
The lower 32-byte area of set 1 is not banked. This area contains 16 bytes for mapped system registers (D0H–
DFH) and a 16-byte common area (C0H–CFH) for working register addressing.
Registers in set 1 are directly accessible at all times using Register addressing mode. The 16-byte working
register area ,however, can only be accessed using working register addressing. Working register addressing is a
function of Register addressing mode (see Chapter 3, "Addressing Modes," for more information).
REGISTER SET 2
The same 64-byte physical space that is used for the set 1 register locations C0H–FFH is logically duplicated to
add another 64 bytes. This expanded area of the register file is called set 2. The logical division of set 1 and set
2 is maintained by means of addressing mode restrictions: while you can access set 1 using Register addressing
mode only, you should use Register Indirect addressing mode or Indexed addressing mode to access set 2.
For the S3C880A/F880A, the set 2 address range (C0H–FFH) is accessible on page 0 and page 1. Please note,
however, that on page 1, the set 2 locations FCH–FFH are not mapped.
Part of the OSD video RAM is in page 1, set 2 (C0H–FBH), and the other part (00H–BFH) is in the page 1 prime
register area. To avoid programming errors, we recommend using either Register Indirect or Indexed mode to
address the entire 252-byte video RAM area.
PRIME REGISTER SPACE
The lower 192 bytes (00H–BFH) of the S3C880A/F880A 's two 256-byte register pages and the 64 bytes (00H–
3FH) of register page 2 are called prime register area. Prime registers can be accessed using any of the seven
addressing modes. The prime register area on page 0 is immediately addressable after a reset. In order to
address registers on page 1 (in the OSD video RAM), you must first set the register page pointer (PP) to the
appropriate source and destination values.
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