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| 型號(hào)： | S3C72M9XX-QA |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 4-BIT, MROM, 6 MHz, MICROCONTROLLER, PQFP128 |
| 封裝： | 14 X 20 MM, QFP-128 |
| 文件頁(yè)數(shù)： | 83/265頁(yè) |
| 文件大?。?/td> | 1133K |
| 代理商： | S3C72M9XX-QA |
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TIMERS and TIMER/COUNTERS
S3C72M5/C72M7/C72M9/P72M9 (Preliminary Spec)
11-26
TC1 ENABLE/DISABLE PROCEDURE
Enable Timer/Counter 1
— Set the TC1 interrupt enable flag IET1 to logic one
— Set TMOD1A.3 to logic one
TCNT1, IRQT1, and TOL1 are cleared to logic zero, and timer/counter operation starts.
Disable Timer/Counter 1
— Set TMOD1A.2 to logic zero
Clock signal input to the counter register TCNT1 is halted. The current TCNT1 value is retained and can be read
if necessary.
TC1 PROGRAMMABLE TIMER/COUNTER FUNCTION
Timer/counter 1 can be programmed to generate interrupt requests at variable intervals, based on the system
clock frequency you select. The 8-bit TC1 mode register, TMOD1A, is used to activate the timer/counter and to
select the clock frequency; the 16-bit reference register, TREF1, is used to store the value for the desired
number of clock pulses between interrupt requests. The 16-bit counter register, TCNT1, counts the incoming
clock pulses, which are compared to the TREF1 value. When there is a match, an interrupt request is generated.
To program timer/counter 1 to generate interrupt requests at specific intervals, select one of the four internal
clock frequencies (divisions of the system clock, fxx) and load a counter reference value into the TREF1 register.
TCNT1 is incremented each time an internal counter pulse is detected with the reference clock frequency
specified by TMOD1A.4–TMOD1A.6 settings. To generate an interrupt request, the TC1 interrupt request flag
(IRQT1) is set to logic one, the status of TOL1 is inverted, and the interrupt is output. The content of TCNT1 is
then cleared to 0000H, and TC1 continues counting. The interrupt request mechanism for TC1 includes an
interrupt enable flag (IET1) and an interrupt request flag (IRQT1).
TC1 TIMER/COUNTER OPERATION SEQUENCE
The general sequence of operations for using TC1 can be summarized as follows:
1.
Set TMOD1A.7 to "1" to be operated as timer/counter 1.
2.
Set TMOD1A.2 to "1" to enable TC1.
3.
Set TMOD1A.6 to "1" to enable the system clock (fxx) input.
4.
Set TMOD1A.5 and TMOD1A.4 bits to desired internal frequency (fxx/2n).
5.
Load a value to TREF1 to specify the interval between interrupt requests.
6.
Set the TC1 interrupt enable flag (IET1) to "1".
7.
Set TMOD1A.3 bit to "1" to clear TCNT1, IRQT1, and TOL1, and start counting.
8.
TCNT1 increments with each internal clock pulse.
9.
When the comparator shows TCNT1 = TREF1, the IRQT1 flag is set to "1" and an interrupt request is
generated.
10. Output latch (TOL1) logic toggles high or low.
11. TCNT1 is cleared to 0000H and counting resumes.
12. Programmable timer/counter operation continues until TMOD1A.2 is cleared to "0".
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| S3C72N2 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:The S3C72N2/C72N4 single-chip CMOS microcontroller has been designed for high performance using Samsungs newest 4-bit CPU core, SAM47 (Samsung Arrange |
| S3C72N4 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:The S3C72N2/C72N4 single-chip CMOS microcontroller has been designed for high performance using Samsungs newest 4-bit CPU core, SAM47 (Samsung Arrange |
| S3C72N5 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:single-chip CMOS microcontroller |
| S3C72N8 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:single-chip CMOS microcontroller |
| S3C72P9 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:SINGLE-CHIP MICROCONTROLLER HAS BEEN DESIGNED FOR HIGH PERFORMANCE USING |
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