
SLVS312A – JULY 2000 – REVISED DECEMBER 2002
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
Overvoltage Protection and Lockout for
12 V, 5 V, 3.3 V
Undervoltage Protection and Lockout for
5 V and 3.3 V
Fault Protection Output With Open-Drain
Output Stage
Open-Drain Power Good Output Signal for
Power Good Input, 3.3 V and 5 V
Power Good Delay; 300-ms TPS3510,
150-ms TPS3511
75-ms Delay for 5-V and 3.3-V Power
Supply Short-Circuit Turnon Protection
2.3-ms PSON Control to FPO Turnoff Delay
38-ms PSON Control Debounce
73-
μ
s Width Noise Deglitches
Wide Supply Voltage Range From 4 V
to 15 V
description
The TPS3510/1 is designed to minimize external components of personal-computer switching power supply
systems. It provides protection circuits, power good indicator, fault protection output (FPO) and PSON control.
Overvoltage protection (OVP) monitors 3.3 V, 5 V, and 12 V (12-V signal detects via V
DD
pin). Undervoltage
protection (UVP) monitors 3.3 V and 5 V. When an OV or UV condition is detected, the power good output (PGO)
is set to low and FPO is latched high. PSON from low to high resets the protection latch. UVP function is enabled
75 ms after PSON is set low and debounced. Furthermore, there is a 2.3-ms delay (and an additional 38-ms
debounce) at turnoff. There is no delay during turnon.
Power good feature monitors PGI, 3.3 V and 5 V and issues a power good signal when the output is ready.
The TPS3510/1 is characterized for operation from –40
°
C to 85
°
C.
typical application
1
2
3
4
8
7
6
5
PGI
GND
FPO
PSON
PGO
VDD
VS5
VS33
PSON
(From Motherboard)
5 VSB
PGO
0.5 V
Drop
PGI
12 V
VSB
5 V
3.3 V
Copyright
2002, Texas Instruments Incorporated
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Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
1
2
3
4
8
7
6
5
PGI
GND
FPO
PSON
PGO
V
DD
VS5
VS33
D OR P PACKAGE
(TOP VIEW)