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參數(shù)資料
| 型號： | S29GL128N90FAIV10 |
| 廠商： | SPANSION LLC |
| 元件分類： | DRAM |
| 英文描述： | 3.0 Volt-only Page Mode Flash Memory featuring 110 nm MirrorBit⑩ Process Technology |
| 中文描述： | 8M X 16 FLASH 3V PROM, 90 ns, PBGA64 |
| 封裝： | 13 X 11 MM, 1MM PITCH, FBGA-64 |
| 文件頁數(shù)： | 70/100頁 |
| 文件大?。?/td> | 952K |
| 代理商： | S29GL128N90FAIV10 |
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68
S29GL-N MirrorBit Flash Family
S29GL-N_00_B3 October 13, 2006
D a t a S h e e t
Notes:
1. VA = Valid address for programming. During a sector erase operation, a valid
address is any sector address within the sector being erased. During chip erase, a
valid address is any non-protected sector address.
2. DQ7 should be rechecked even if DQ5 =
1
because DQ7 may change simulta-
neously with DQ5.
Figure 5. Data# Polling Algorithm
RY / BY # : Ready/ Busy#
The RY/BY# is a dedicated, open-drain output pin which indicates whether an Embedded Al-
gorithm is in progress or complete. The RY/BY# status is valid after the rising edge of the final
WE# pulse in the command sequence. Since RY/BY# is an open-drain output, several RY/BY#
pins can be tied together in parallel with a pull-up resistor to V
CC
.
If the output is low (Busy), the device is actively erasing or programming. (This includes pro-
gramming in the Erase Suspend mode.) If the output is high (Ready), the device is in the read
mode, the standby mode, or in the erase-suspend-read mode.
Table 16 on page 72
shows
the outputs for RY/BY#.
DQ7 = Data
Yes
No
No
DQ5 = 1
No
Yes
Yes
FAIL
PASS
Read DQ15–DQ0
Addr = VA
Read DQ15–DQ0
Addr = VA
DQ7 = Data
START
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