參數(shù)資料
型號(hào): S29GL032M10BAIR02
廠商: SPANSION LLC
元件分類: DRAM
英文描述: 256,128,64,32,Megabit 3.0 Volt-only Page Mode Flash Memory featuring 0.23 レm MirrorBit Process Technology
中文描述: 4M X 8 FLASH 3V PROM, 100 ns, PBGA48
封裝: 8 X 9 MM, FBGA-48
文件頁數(shù): 76/116頁
文件大?。?/td> 1656K
代理商: S29GL032M10BAIR02
74
S29GL-M MirrorBit
TM
Flash Family
S29GL-M_00_B6 October 10, 2006
D a t a S h e e t
Note:
The system should recheck the toggle bit even if DQ5 = “1” because the toggle bit may stop toggling as DQ5
changes to “1.” See the subsections on DQ6 and DQ2 for more information.
Figure 8. Toggle Bit Algorithm
DQ2: Toggle Bit II
The “Toggle Bit II” on DQ2, when used with DQ6, indicates whether a particular sector is actively
erasing (that is, the Embedded Erase algorithm is in progress), or whether that sector is erase-
suspended. Toggle Bit II is valid after the rising edge of the final WE# pulse in the command
sequence.
DQ2 toggles when the system reads at addresses within those sectors that are selected for era-
sure. (The system may use either OE# or CE# to control the read cycles.) But DQ2 cannot
distinguish whether the sector is actively erasing or is erase-suspended. DQ6, by comparison, in-
dicates whether the device is actively erasing, or is in Erase Suspend, but cannot distinguish
which sectors are selected for erasure. Thus, both status bits are required for sector and mode
information. Refer to
Table 36
to compare outputs for DQ2 and DQ6.
START
No
Yes
Yes
DQ5 = 1
No
Yes
Toggle Bit
= Toggle
No
Program/Erase
Operation Not
Complete, Write
Reset Command
Program/Erase
Operation Complete
Read DQ7–DQ0
Toggle Bit
= Toggle
Read DQ7–DQ0
Twice
Read DQ7–DQ0
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