參數(shù)資料
型號(hào): S29CD016J1MQFM002
廠商: Spansion Inc.
英文描述: 32/16 Megabit CMOS 2.6 Volt or 3.3 Volt-only Simultaneous Read/Write, Dual Boot, Burst Mode Flash Memory with VersatileI/O
中文描述: 32/16兆位的CMOS 2.6伏或3.3伏,只有同時(shí)讀/寫,雙啟動(dòng),突發(fā)模式閃存記憶體與VersatileI /輸出
文件頁數(shù): 67/76頁
文件大?。?/td> 1245K
代理商: S29CD016J1MQFM002
September27,2006 S29CD-J_CL-J_00_B1
S29CD-J & S29CL-J Flash Family
65
D a t a
S h e e t
( P r e l i m i n a r y )
18.8
Erase and Programming Performance
Notes
1. Typical program and erase times assume the following conditions: 25
°
C, 2.5 V V
CC
, 100K cycles. Additionally, programming typicals assume checkerboard
pattern.
2. Under worst case conditions of 145°C, V
CC
= 2.5 V, 1M cycles.
3. The typical chip programming time is considerably less than the maximum chip programming time listed.
4. In the pre-programming step of the Embedded Erase algorithm, all bytes are programmed to 00h before erasure.
5. System-level overhead is the time required to execute the two- or four-bus-cycle sequence for the program command. See
Table 20.1
and
Table 20.2
for further
information on command definitions.
6. PPBs have a program/erase cycle endurance of 100 cycles.
7. Guaranteed cycles per sector is 100K minimum.
18.9
Latchup Characteristics
Note
Includes all pins except V
CC
. Test conditions: V
CC
= 3.0 V, one pin at a time.
18.10 PQFP and Fortified BGA Pin Capacitance
Notes
1. Sampled, not 100% tested.
2. Test conditions T
A
= 25°C, f = 1.0 MHz.
Table 18.7
Erase and Programming Performance
Parameter
Typ
(Note 1)
Max
(Note 2)
Unit
Comments
Sector Erase Time
0.5
5
s
Excludes 00h programming prior to erasure
(Note 4)
Chip Erase Time
16 Mb = 46
32 Mb = 78
16 Mb = 230
32 Mb = 460
s
Double Word Program Time
8
130
μs
Excludes system level overhead
(Note 5)
Accelerated Double Word Program Time
8
130
μs
Accelerated Chip Program Time
16 Mb = 5
32 Mb = 10
16 Mb = 50
32 Mb = 100
s
Chip Program Time, x32
(Note 3)
16 Mb = 12
32 Mb = 24
16 Mb = 120
32 Mb = 240
s
Table 18.8
Latchup Characteristics
Description
Min
Max
Input voltage with respect to V
SS
on all pins except I/O pins (including A9, ACC, and WP#)
Input voltage with respect to V
SS
on all I/O pins
V
CC
Current
–1.0 V
12.5 V
–1.0 V
V
CC
+ 1.0 V
+100 mA
–100 mA
Table 18.9
PQFP and Fortified BGA Pin Capacitance
Parameter Symbol
Parameter Description
Test Setup
Typ
Max
Unit
C
IN
C
OUT
C
IN2
Input Capacitance
V
IN
= 0
V
OUT
= 0
V
IN
= 0
6
7.5
pF
Output Capacitance
8.5
12
pF
Control Pin Capacitance
7.5
9
pF
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