參數(shù)資料
型號: S29CD016G0JQFI200
廠商: Spansion Inc.
英文描述: 32 Megabit (1M x 32-Bit), 16 Megabit (512K x 32-Bit) 2.5 Volt-only Burst Mode, Dual Boot, Simultaneous Read/ Write Flash Memory with VersatileI/O
中文描述: 32兆位(1米× 32位),16兆位(512k × 32的位),2.5伏,只有突發(fā)模式,雙啟動,同步讀/寫閃存與VersatileI內(nèi)存/輸出
文件頁數(shù): 49/87頁
文件大?。?/td> 792K
代理商: S29CD016G0JQFI200
November 14, 2005 S29CD-G_00_B0
S29CD-G Flash Family
47
P r e l i m i n a r y
on the falling edge of WE# or CE# (whichever occurs last) while the command (30h) is latched
on the rising edge of WE# or CE# (whichever occurs first).
Specifying multiple sectors for erase is accomplished by writing the six bus cycle operation, as
described above, and then following it by additional writes of only the last cycle of the Sector
Erase command to addresses or other sectors to be erased. The time between Sector Erase com-
mand writes must be less than 80 μs, otherwise the command is rejected. It is recommended that
processor interrupts be disabled during this time to guarantee this critical timing condition. The
interrupts can be re-enabled after the last Sector Erase command is written. A time-out of 80 μs
from the rising edge of the last WE# (or CE#) initiates the execution of the Sector Erase com-
mand(s). If another falling edge of the WE# (or CE#) occurs within the 80 μs time-out window,
the timer is reset. Once the 80 μs window times out and erasure begins, only the Erase Suspend
command is recognized (See
Sector Erase and Program Suspend Command
on page 47
and
Sector Erase and Program Resume Command
on page 49
). If that occurs, the sector erase com-
mand sequence should be reinitiated once that bank returns to reading array data, to ensure data
integrity. Loading the sector erase registers may be done in any sequence and with any number
of sectors.
Sector erase does not require the user to program the device prior to erase. The device automat-
ically preprograms all memory locations, within sectors to be erased, prior to electrical erase.
When erasing a sector or sectors, the remaining unselected sectors or the write protected sectors
are unaffected. The system is not required to provide any controls or timings during sector erase
operations. The Erase Suspend and Erase Resume commands may be written as often as required
during a sector erase operation.
Automatic sector erase operations begin on the rising edge of the WE# or CE# pulse of the last
sector erase command issued, and once the 80 μs time-out window expires. The status of the
sector erase operation is determined three ways:
Further status of device activity during the sector erase operation is determined using toggle bit
DQ2 (See
DQ2: Toggle Bit II
on page 58
).
Data# polling of the DQ7 pin
Checking the status of the toggle bit DQ6
Checking the status of the RY/BY# pin
When the Embedded Erase algorithm is complete, the device returns to reading array data, and
addresses are no longer latched. Note that an address change is required to begin read valid array
data.
Figure 5 on page 48
illustrates the Embedded Erase Algorithm, using a typical command se-
quence and bus operation. See the
Erase/Program Operations
on page 73
for parameters, and
to
Figure 21
and
Figure 22
for timing diagrams.
Sector Erase and Program Suspend Command
The Sector Erase and Program Suspend command allows the user to interrupt a Sector Erase or
Program operation and perform data read or programs in a sector that is not being erased or to
the sector where a programming operation was initiated. This command is applicable only during
the Sector Erase and Programming operation, which includes the time-out period for Sector
Erase.
Sector Erase and Program Suspend Operation Mechanics
The Sector Erase and Program Suspend command is ignored if written during the execution of the
Chip Erase operation or Embedded Program Algorithm (but resets the chip if written improperly
during the command sequences). Writing the Sector Erase and Program command during the
Sector Erase time-out results in immediate termination of the time-out period and suspension of
the erase operation. Once in Erase Suspend, the device is available for reading (note that in the
相關(guān)PDF資料
PDF描述
S29CD016G0MFAA002 32 Megabit (1M x 32-Bit), 16 Megabit (512K x 32-Bit) 2.5 Volt-only Burst Mode, Dual Boot, Simultaneous Read/ Write Flash Memory with VersatileI/O
S29CD016G0MFAA010 32 Megabit (1M x 32-Bit), 16 Megabit (512K x 32-Bit) 2.5 Volt-only Burst Mode, Dual Boot, Simultaneous Read/ Write Flash Memory with VersatileI/O
S29CD016G0MFAA012 32 Megabit (1M x 32-Bit), 16 Megabit (512K x 32-Bit) 2.5 Volt-only Burst Mode, Dual Boot, Simultaneous Read/ Write Flash Memory with VersatileI/O
S29CD016G0JFAA000 32 Megabit (1M x 32-Bit), 16 Megabit (512K x 32-Bit) 2.5 Volt-only Burst Mode, Dual Boot, Simultaneous Read/ Write Flash Memory with VersatileI/O
S29CD016G0JFAA002 32 Megabit (1M x 32-Bit), 16 Megabit (512K x 32-Bit) 2.5 Volt-only Burst Mode, Dual Boot, Simultaneous Read/ Write Flash Memory with VersatileI/O
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