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參數(shù)資料
| 型號： | S1M8831A |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | FRACTIONAL-N RF/INTEGER-N IF DUAL PLL |
| 中文描述： | 分數(shù)N射頻/整數(shù)N如果雙鎖相環(huán) |
| 文件頁數(shù)： | 5/32頁 |
| 文件大小： | 248K |
| 代理商： | S1M8831A |
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FRACTIONAL-N RF/INTEGER-N IF DUAL PLL
S1M8831A/33
5
PIN DESCRIPTION
Pin No.
1
Symbol
V
DD
RF
V
P
RF
CP
o
RF
DGND
f
in
RF
f
in
RF
I/O
–
Description
RF PLL power supply(2.7V to 4.0V). Must be equal to V
DD
IF.
Power supply for RF charge pump. Must be
≥
V
DD
RF and V
DD
IF.
RF charge pump output. Connected to an external loop filter.
2
–
3
O
4
5
–
I
Ground for RF PLL digital circuitry.
RF prescaler input. Small signal input from the external VCO.
6
I
RF prescaler complementary input. For a single-ended output RF VCO, a
bypass capacitor should be placed as close as possible to this pin and be
connected directly to the ground plane.
Ground for RF PLL analog circuitry.
7
GND
RF
OSCx
–
8
I
RF R counter input (IF_N[22]=0) or not-use (IF_N[22]=1) which can be
configured depending on the state of the program bit IF_N[22].
Oscillator input to drive both the IF and RF R counter inputs (IF_N[22]=1) or
only the IF R counter (IF_N[22]=0) which can be configured depending on
the state of the program bit IF_N[22].
Multiplexed output of N or R divider and RF/IF lock detect.
RF PLL Enable (enable when high, power down when low).
Controls the RF PLL to power down directly, not depending on a program
control. Also sets the charge pump output to be in TRI-STATE when LOW.
Powers up when HIGH depends on the state of RF_CTL_WORD.
IF PLL Enable(enable when high, power-down when low).
Controls the IF PLL to power down directly. The same as RF_EN except
that power-up depends on the state of IF_CTL_WORD.
CMOS clock input. Data for the various counters is clocked into the 24-bit
shift register on the rising edge.
Binary serial data input. Data entered MSB (Most Significant Bit) first.
Load enable when LE goes HIGH. High impedance CMOS input.
Ground for IF analog circuitry.
9
OSCin
I
10
11
foLD
RF_EN
O
I
12
IF_EN
I
13
CLOCK
I
14
15
16
DATA
LE
GND
IF
f
in
IF
I
I
–
17
I
IF Prescaler complementary input. For a single-ended output IF VCO, a
bypass capacitor should be placed as close as possible to this pin.
IF prescaler input. Small signal input from the VCO.
18
f
in
IF
DGND
CPoIF
I
19
20
–
O
Ground for IF PLL digital circuitry.
IF charge pump output. Connected to an external loop filter.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| S1M8831A/33 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:FRACTIONAL-N RF/INTEGER-N IF DUAL PLL |
| S1M8831A01-G0T0 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:FRACTIONAL-N RF/INTEGER-N IF DUAL PLL |
| S1M8833 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:FRACTIONAL-N RF/INTEGER-N IF DUAL PLL |
| S1M8833X01-G0T0 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:FRACTIONAL-N RF/INTEGER-N IF DUAL PLL |
| S1M8836 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:FRACTIONAL-N RF/INTEGER-N IF DUAL PLL |
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