
RX IF/BBA WITH AGC
S1M8656A
5
PIN DESCRIPTION (Continued)
Pin No
32
Symbol
SLEEPB/CLK
I/O
DI
Description
When SEN is high, this pin inputs the clock with the permit of the 3-
line serial control input. When SEN is low, parallel control input is
allowed and this pin performs SLEEPB. If this pin is opened, it
remains at Low.
Reference frequency input terminal connected to the VCTCXO output.
When this pin stops, only DC bias is delivered to maintain the DC
charge value of the capacitor connected externally.
Division output of the TCXO Reference frequency input. 3-different
division ratio and 2- output drive capacities can be selected through
the SPI bus control. Default : 4.92MHz, Weak OUT *division ratio : 1,
1/4, 1/16
CHIPx8 CLOCK output terminal. It has a division ratio of 512/1025 for
the TCXO reference frequency.
Therefore, it cannot have a perfect 50% duty. When this terminal is
not used (CDMA SLEEP, FM IDLE), it remains at Low. This pin can
be used exclusively for the externally generated CHIPx8 CLOCK input
using the SPI BUS control.
CDMA A-D Converter's digital outputs, which are connected to the
modem data input pins. These data are synchronized at CHIPx8's
rising edge and output. Because they are valid at the falling edge, the
data are latched at the falling edge in the modem.
Because the number of 48-pins are restricted in this product, pins 47
and 48 are shared with the FMDATA pin.
36
TCXO
AI
37
TCXO/N
DO
38
CHIPx8
BI
39
40
41
42
45
46
47
48
4, 6,
14,
15, 17,
20, 24
35
44
RXQD3
RXQD2
RXQD1
RXQD0
RXID3
RXID2
RXID1/FMRID
RXID0/FMRQD
VCC
DO
AI
Power input terminal for the analog circuit.
VDD
VDD
DI
DI
Power for the digital logic.
Power source for a logic circuit ,related to the digital input /output,
connected to an external digital logic such as the modem.
Analog circuit ground.
Pin-18 is N.C. in the product.
3, 5, 8,
13, 16,
18, 19,
23, 43
34
33
GNDA
AI
GNDD
NC
DI
-
Digital logic circuit ground.
This pin is used for internal testing only and is not connected to
anything.