參數(shù)資料
型號(hào): S1C621A0F0A0100
元件分類: 微控制器/微處理器
英文描述: MICROCONTROLLER, PQFP80
封裝: QFP-80
文件頁數(shù): 9/161頁
文件大小: 1037K
代理商: S1C621A0F0A0100
107
32000D–04/2011
AVR32
9.3.3
Multiplication Operations
sub
CRd, Rs
Subtract.
Rd
← Rd - Rs
1
E
Rd, Rx, Ry << sa
Rd
← Rx - (Ry<<sa2)
1
CRd, imm
if (Rd==SP)
Rd
← Rd - SE(imm8<<2)
else
Rd
← Rd - SE(imm8)
1
E
Rd, imm
Rd
← Rd - SE(imm21)
1
E
Rd, Rs, imm
Rd
← Rs - SE(imm16)
1
sub{cond4}
E
Rd, imm
Subtract immediate if condition satisfied.
if (cond4) Rd
← Rd - SE(imm8)
1
E
Rd, Rx, Ry
Subtract if condition satisfied.
if (cond4) Rd
← Rx - Ry
2
tnbz
C
Rd
Test no byte equal to zero.
if (Rd[31:24] == 0
Rd[23:16] == 0
Rd[15:8] == 0
∨ Rd[7:0] == 0 )
Z
← 1
else
Z
← 0
1
Table 9-2.
Arithmetic Operations (Continued)
Table 9-3.
Multiplication Operations
Mnemonics
Operands / Syntax
Description
Operation
Rev
divs
E
Rd, Rx, Ry
Signed divide.
(32
← 32/32)
Rd
← Rx / Ry
Rd+1
← Rx % Ry
1
divu
E
Rd, Rx, Ry
Unsigned divide.
(32
← 32/32)
Rd
← Rx / Ry
Rd+1
← Rx % Ry
1
mac
E
Rd, Rx, Ry
Multiply accumulate.
(32
← 32x32 + 32)
Rd
← Rx * Ry + Rd
1
macs.d
E
Rd, Rx, Ry
Multiply signed accumulate.
(64
← 32x32 + 64)
Rd+1:Rd
← Rx * Ry + Rd+1:Rd
1
macu.d
E
Rd, Rx, Ry
Multiply unsigned accumulate.
(64
← 32x32 + 64)
Rd+1:Rd
← Rx * Ry + Rd+1:Rd
1
mul
CRd, Rs
Multiply.
(32
← 32 x 32)
Rd
← Rx * Rs
1
E
Rd, Rx, Ry
Multiply.
(32
← 32 x 32)
Rd
← Rx * Ry
1
E
Rd, Rs, imm
Multiply immediate.
Rd
← Rs * SE(imm8)
1
muls.d
E
Rd, Rx, Ry
Signed Multiply.
(64
← 32 x 32)
Rd+1:Rd
← Rx * Ry
1
mulu.d
E
Rd, Rx, Ry
Unsigned Multiply.
(64
← 32 x 32)
Rd+1:Rd
← Rx * Ry
1
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