參數(shù)資料
型號: S1C33L05
元件分類: 微控制器/微處理器
英文描述: RISC MICROCONTROLLER, PQFP176
封裝: 24 X 24 MM, 1.40 MM HEIGHT, 0.50 MM PITCH, PLASTIC, QFP21-176
文件頁數(shù): 1/8頁
文件大?。?/td> 81K
代理商: S1C33L05
1
S1C33L05
32-bit Single Chip Microcomputer
● 32-bit S1C33000 RISC Core
● Low Power
● Multiply Accumulation
● Built-in 16K-byte RAM
● 10-bit ADC
● Built-in LCD Controller
● Built-in USB1.1 Function Controller
● Built-in SDRAM Controller
■ DESCRIPTION
The S1C33L05 is a Seiko Epson original 32-bit microcomputer that features high speed, low power consump-
tion, and low-voltage operation. The S1C33L05 consists of an S1C33000 32-bit RISC type CPU as its core,
peripheral circuits including a bus control unit, DMA controller, interrupt controller, timers, serial interface with
FIFO, A/D converter, a color STN LCD controller that supports 64K color display, SDRAM controller, USB1.1
function controller, sequential ROM interface, MMC (SPI mode) interface and NAND flash interface, and also an
embedded RAM. Two oscillation circuits and a PLL are also included, supporting advanced operation, power-
saving operation, and high-performance realtime clock functions. The S1C33L05 is ideal for portable products
that require high-speed data processing. Especially it is suitable for the application processor embedded in
PDAs, electronic dictionary and e-Book readers.
■ FEATURES
● Core CPU
Seiko Epson original 32-bit RISC CPU S1C33000 built-in
Basic instruction set: 105 instructions (16-bit fixed size)
Sixteen 32-bit general-purpose register
32-bit ALU and 8-bit shifter
Multiplication/division instructions and MAC (multiplication and accumulation) instruction are available
20.83 ns of minimum instruction execution time at 48 MHz operation
● Internal memory
General-purpose RAM .............................. 16K bytes (1-cycle-access)
Video-RAM ............................................... 40K bytes (usable for general-purpose RAM, 2-cycle-access)
● Internal peripheral circuits
OSC3 oscillation circuit/PLL ..................... When PLL is disabled
Crystal oscillator
5 MHz min. to 48 MHz max.
Ceramic oscillator
48 MHz (fixed)
External clock input
2 MHz min. to 48 MHz max.
When PLL is enabled
Crystal oscillator
20 MHz min. to 48 MHz max.
Ceramic oscillator
48 MHz (fixed)
External clock input
20 MHz min. to 48 MHz max.
Generates the main clock for the bus and the CPU.
The software controllable PLL multiplies the high-speed (OSC3)
oscillation clock frequency.
PLL input clock
10 MHz min. to 24 MHz max.
PLL output clock
10 MHz min. to 48 MHz max.
OSC1 oscillation circuit ............................. Crystal oscillator or external clock input 32.768 kHz typ.
Generates the source clock for the realtime clock function, etc.
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