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參數(shù)資料
| 型號(hào)： | S1R72803F00A |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 1 CHANNEL(S), 400M bps, SERIAL COMM CONTROLLER, PQFP184 |
| 封裝： | 0.40 MM PITCH, PLASTIC, QFP20-184 |
| 文件頁(yè)數(shù)： | 1/8頁(yè) |
| 文件大?。?/td> | 97K |
| 代理商： | S1R72803F00A |
1
S1R72803F00A
s DESCRIPTION
The S1R72803F00A is an IEEE Standard 1394-1995, P1394a Draft2.1 compliant LINK/Transaction Controller.
Since some of the transaction functions of this controller have become hardware, the later PageTable fetch and
data transmission can be executed automatically by setting the PageTable address and size in SBP-2.
In addition, thanks to a built-in MPU (SEIKO EPSON’s original 32-bit RISC processor S1C33) called a Flash
ROM which is necessary for the conversion system, the controller can provide peripheral devices with the
optimum 1394 interfaces by simply adding a Cable PHY Transceiver/Arbiter that complies with the standard.
s FEATURES
q LINK/Transaction Controller
All interactive data transmissions in both asynchronous and isochronous transfer modes are supported.
Stable interactive data transmissions of 100 Mbps, 200 Mbps and 400 Mbps of MaxPayload were made
possible by the built-in SRAM.
The hardware can detect IsocronousResourceManager automatically.
Some of the transaction functions have become hardware to prevent the actual data transmission rate
from declining due to overhead (to secure the dedicated partition).
Communication with the upper layers has been simplified by separating the header and data partitions.
The data partition has been subdivided into Stream and ORB partitions.
A ring buffer is employed for the recipient header, recipient data (recipient Stream and recipient ORB
partitions) and sending data partitions.
The sizes of all partitions can be set freely.
The busy state during data reception is controlled by the hardware automatically.
q SBP-2 Support
By setting the PageTable address and size in SBP-2, the later Page Table fetch and data transmission can
be executed automatically.
q PHY/LINK Interface
The P1394a is supported.
Transmission rate 100/200/400 Mbps are supported.
Isolation is supported (a bus holder is built in).
q CPU
SEIKO EPSON’s original 32-bit Microsoft Controller Unit is built in.
Booting using both internal and external Flash ROMs is possible.
q IDE Interface
PIO mode 0/1/2/3/4, Multiword DMA mode 0/1/2 and Ultra-DMA mode 0/1/2/3/4 are supported.
q I/O baffer with 5V tolerance
q Built-in SRAM
For the data packet : 8-Kbyte
For the MCU work : 8-Kbyte
q Built-in Flash ROM
An 64-Kbyte Flash ROM is built-in.
q 3.3 V/ 5.0 V power supply
q 184-pin flat package (Pin pitch: 0.4 mm)
s The package is not designed to be radiation-proof.
IEEE1394 LINK/ Transaction Controller
S1R72803F00A
PF1192-03
Preliminary
q SBP-2 LINK Engine on chip
q High-speed transfer(Ultra ATA66)
q Built-in CPU and Flash
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| S1R72803F00A200 | 功能描述:IC LINK CTRLR 1394 IDE-66 184QFP RoHS:否 類別:集成電路 (IC) >> 接口 - 控制器 系列:- 標(biāo)準(zhǔn)包裝:4,900 系列:- 控制器類型:USB 2.0 控制器 接口:串行 電源電壓:3 V ~ 3.6 V 電流 - 電源:135mA 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:36-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:36-QFN（6x6） 包裝:* 其它名稱:Q6396337A |
| S1R72805F00A2 | 功能描述:IC LINK CTRLR 1394 IDE100 100QFP RoHS:否 類別:集成電路 (IC) >> 接口 - 控制器 系列:- 標(biāo)準(zhǔn)包裝:4,900 系列:- 控制器類型:USB 2.0 控制器 接口:串行 電源電壓:3 V ~ 3.6 V 電流 - 電源:135mA 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:36-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:36-QFN（6x6） 包裝:* 其它名稱:Q6396337A |
| S1R72901F00A | 功能描述:IC LINK CTRLR/PHY 1394 100-QFP RoHS:否 類別:集成電路 (IC) >> 接口 - 控制器 系列:- 標(biāo)準(zhǔn)包裝:4,900 系列:- 控制器類型:USB 2.0 控制器 接口:串行 電源電壓:3 V ~ 3.6 V 電流 - 電源:135mA 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:36-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:36-QFN（6x6） 包裝:* 其它名稱:Q6396337A |
| S1R72901F00A200 | 功能描述:IC PHY CONT 2PORT 1394A 100-QFP RoHS:否 類別:集成電路 (IC) >> 接口 - 控制器 系列:- 標(biāo)準(zhǔn)包裝:4,900 系列:- 控制器類型:USB 2.0 控制器 接口:串行 電源電壓:3 V ~ 3.6 V 電流 - 電源:135mA 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:36-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:36-QFN（6x6） 包裝:* 其它名稱:Q6396337A |
| S1R72C05 | 制造商:EPSON 制造商全稱:EPSON 功能描述:Support for control, bulk, interrupt, and isochronous transfers |
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