參數(shù)資料
型號: S-8232AYFT-T2
元件分類: 電源管理
英文描述: 2-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO8
封裝: TSSOP-8
文件頁數(shù): 2/26頁
文件大?。?/td> 729K
代理商: S-8232AYFT-T2
BATTERY PROTECTION IC FOR 2-CELL SERIAL PACK
S-8232 Series
Rev.4.3_01
Seiko Instruments Inc.
10
(7) Test Condition 7, Test Circuit 4
Set S1
= ON, S2 = OFF, V1 = V2 = 3.6 V and V3 = 0 V under normal condition. Increase V4 from 0 V
gradually. The V4 voltage when I1
= 10 A is the CO “H” voltage (VC0H).
Set S1
= OFF, S2 = ON, V1 = V2 = 4.7, V3 = 0 V, and V4 = 9.4 V under over voltage condition. (V5) / I2
is the CO pin internal resistance (RCOL).
(8) Test Condition 8, Test Circuit 5
Set V1
= V2 = 3.6 V, and V3 = 0 V under normal condition. Increase V1 from (VCU1 0.2 V) to (VCU1 +
0.2 V) immediately (within 10
s). The time after V1 becomes (VCU1 + 0.2 V) until CO goes “L” is the
overcharge detection delay time 1 (tCU1).
Set V1
= V2 = 3.5 V, and V3 = 0 V under normal condition. Decrease V1 from (VDD1 + 0.2 V) to (VDD1
0.2 V) immediately (within 10
s). The time after V1 becomes (VDD1 0.2 V) until DO goes “L” is the
overdischarge detection delay time 1 (tDD1).
(9) Test Condition 9, Test Circuit 5
Set V1
= V2 = 3.6 V, and V3 = 0 V under normal condition. Increase V2 from (VCU2 0.2 V) to (VCU2 +
0.2 V) immediately (within 10
s). The time after V2 becomes (VCU2 + 0.2 V) until CO goes “L” is the
overcharge detection delay time 2 (tCU2).
Set V1
= V2 = 3.6 V, and V3 = 0 V under normal condition. Decrease V2 from (VDD2 + 0.2 V) to (VDD2
0.2 V) immediately (within 10
s). The time after V2 becomes (VDD2 0.2 V) until DO goes “L” is the
overdischarge detection delay time 2 (tDD2).
(10) Test Condition 10, Test Circuit 5
Set V1
= V2 = 3.6 V, and V3 = 0 V under normal condition. Increase V3 from 0 V to 0.5 V immediately
(within 10
s). The time after V3 becomes 0.5 V until DO goes “L” is the overcurrent detection delay time
1 (tI0V1).
(11) Test Condition 11, Test Circuit 6
Set V1
= V2 = 0 V, and V3 = 2 V, and decrease V3 gradually. The V3 voltage when CO = “L” (VCC 0.3 V
or lower) is the 0 V charge starting voltage (V0CHA).
(12) Test Condition 12, Test Circuit 6
Set V1
= 0 V, V2 = 3.6 V, and V3 = 12 V, and increase V1 gradually. The V1 voltage when CO = “H” (VVM
+ 0.3 V or higher) is the 0 V charge inhibiting voltage 1 (V0INH1).
(13) Test Condition 13, Test Circuit 6
Set V1
= 3.6 V, V2 = 0 V, and V3 = 12 V, and increase V2 gradually. The V2 voltage when CO = “H” (VVM
+ 0.3 V or higher) is the 0 V charge inhibiting voltage 2 (V0INH2).
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