參數(shù)資料
型號(hào)： S-24C016A
廠商： Seiko Instruments Inc.
英文描述： 16Kbits CMOS 2-Wired Serial EEPROM(16K位CMOS 2線串行EEPROM)
中文描述： 16Kbits的CMOS 2 -有線串行EEPROM（16K的位的CMOS 2線串行EEPROM的）
文件頁(yè)數(shù)： 11/53頁(yè)
文件大?。?/td> 220K
代理商： S-24C016A
CMOS 2-WIRED SERIAL EEPROM
S-24C08A/16A Series
10
Seiko Instruments Inc.
Figure 11
Page Write
In the S-24C08A or S-24C16A, the lower 4 bits at the word address are automatically incremented
each when the EEPROM receives 8 bit write data.
Even when the write data exceeds 16 bytes, the upper 4 bits of the word address and page
address (P2, P1, P0) remain unchanged, and the lower 4 bits are rolled over and overwritten.
6.3
Acknowledgment Polling
Acknowledgment polling is used to know when the rewriting of the EEPROM is finished.
After the EEPROM receives the stop condition signal and once it starts to rewrite, all operations
are prohibited. Also, the EEPROM cannot respond to the signal transmitted by the master device.
Accordingly, the master device transmits the start condition signal and the device address
read/write instruction code to the EEPROM (namely, the slave device) to detect the response of
the slave device. This allows users to know when the rewriting of the EEPROM is finished.
That is, if the slave device does not output the acknowledgment signal, it means that the EEPROM
is rewriting; when the slave device outputs the acknowledgment signal, you can know that rewriting
has been completed. It is recommended to use read instruction "1" for the read/write instruction
code transmitted by the master device.
6.4
Write Protection
The S-24C08A and the S-24C16A are capable of protecting the memory. When the WP pin is
connected to V
CC
, writing to all memory area is prohibited.
When the WP pin is connected to GND, the write protection becomes invalid, and writing in all
memory area becomes available. However, when there is no need for using write protection,
always connect the WP pin to GND.
S
T
A
R
T
1
0 1
0
W
R
I
T
E
S
T
O
P
DEVICE
ADDRESS
WORD ADDRESS (n)
DATA (n)
R
/
W
M
S
B
SDA LINE
ADR INC
P2 P1 P0
W7W6W5W4W3W2W1W0
D7 D6 D5D4 D3 D2 D1 D0
A
C
K
L
S
B
A
C
K
A
C
K
0
D7
D0
D7
D0
ADR INC
A
C
K
ADR INC
A
C
K
DATA (n+1)
DATA (n+x)
(P2 is A2 in the S-24C08A.)
相關(guān)PDF資料
PDF描述
S-24C01A The CAT24FC02 is a 2-kb Serial CMOS EEPROM internally organized as 256 words of 8 bits each
S-24C01ADP-11 The CAT24FC02 is a 2-kb Serial CMOS EEPROM internally organized as 256 words of 8 bits each
S-24C01ADP-11-1A The CAT24FC02 is a 2-kb Serial CMOS EEPROM internally organized as 256 words of 8 bits each
S-24C01ADP-11-S The CAT24FC02 is a 2-kb Serial CMOS EEPROM internally organized as 256 words of 8 bits each
S-24C01ADP-TB11 The CAT24FC02 is a 2-kb Serial CMOS EEPROM internally organized as 256 words of 8 bits each
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
S24C01A 制造商:SII 制造商全稱:Seiko Instruments Inc 功能描述:CMOS 2-WIRE SERIAL EEPROM
S-24C01A 制造商:SII 制造商全稱:Seiko Instruments Inc 功能描述:CMOS 2-WIRE SERIAL EEPROM
S-24C01ADP 制造商:SII 制造商全稱:Seiko Instruments Inc 功能描述:CMOS 2-WIRED SERIAL EEPROM
S-24C01ADP-11 制造商:SII 制造商全稱:Seiko Instruments Inc 功能描述:CMOS 2-WIRE SERIAL EEPROM
S-24C01ADP-11-1A 制造商:SII 制造商全稱:Seiko Instruments Inc 功能描述:CMOS 2-WIRE SERIAL EEPROM
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