參數(shù)資料
型號(hào): S-24C016A
廠商: Seiko Instruments Inc.
英文描述: 16Kbits CMOS 2-Wired Serial EEPROM(16K位CMOS 2線串行EEPROM)
中文描述: 16Kbits的CMOS 2 -有線串行EEPROM(16K的位的CMOS 2線串行EEPROM的)
文件頁(yè)數(shù): 10/53頁(yè)
文件大?。?/td> 220K
代理商: S-24C016A
CMOS 2-WIRED SERIAL EEPROM
S-24C08A/16A Series
Seiko Instruments Inc.
9
6. Write
6.1
Byte Write
When the EEPROM receives a 7-bit length device address and a 1-bit read/write instruction code
"0," following the start condition signal, it outputs the acknowledgment signal. Next, when the
EEPROM receives an 8-bit length word address, it outputs the acknowledgment signal.
After the EEPROM receives 8-bit write data and outputs the acknowledgment signal, it receives
the stop condition signal. Next, the EEPROM at the specified memory address starts to rewrite.
When the EEPROM is rewriting, all operations are prohibited and the acknowledgment signal is
not output.
6.2
Page Write
Up to 16 bytes per page can be written in the S-24C08A and S-24C16A.
Basic data transmission procedures are the same as those in the "Byte Write." However, when the
EEPROM receives 8-bit write data which corresponds to the page size, the page can be written.
When the EEPROM receives a 7-bit length device address and a 1-bit read/write instruction code
"0," following the start condition signal, it outputs the acknowledgment signal. When the EEPROM
receives an 8-bit length word address, it outputs the acknowledgment signal.
After the EEPROM receives 8-bit write data and outputs the acknowledgment signal, it receives 8-
bit write data corresponding to the next word address, and outputs the acknowledgment signal.
The EEPROM repeats reception of 8-bit write data and output of the acknowledgment signal in
succession. It is capable of receiving write data corresponding to the maximum page size.
When the EEPROM receives the stop condition signal, it starts to rewrite, corresponding to the
size of the page, on which write data, starting from the specified memory address, is received.
Figure 10
Byte Write
S
T
A
R
T
1
0 1
0
W
R
I
T
E
S
T
O
P
DEVICE
ADDRESS
WORD ADDRESS
DATA
R
/
W
M
S
B
SDA LINE
ADR INC (ADDRESS INCREMENT)
P2 P1 P0
W7W6W5W4W3W2W1W0
D7 D6 D5 D4 D3 D2 D1 D0
A
C
K
L
S
B
A
C
K
A
C
K
0
(
P2 is A2 in the S-24C08A.)
相關(guān)PDF資料
PDF描述
S-24C01A The CAT24FC02 is a 2-kb Serial CMOS EEPROM internally organized as 256 words of 8 bits each
S-24C01ADP-11 The CAT24FC02 is a 2-kb Serial CMOS EEPROM internally organized as 256 words of 8 bits each
S-24C01ADP-11-1A The CAT24FC02 is a 2-kb Serial CMOS EEPROM internally organized as 256 words of 8 bits each
S-24C01ADP-11-S The CAT24FC02 is a 2-kb Serial CMOS EEPROM internally organized as 256 words of 8 bits each
S-24C01ADP-TB11 The CAT24FC02 is a 2-kb Serial CMOS EEPROM internally organized as 256 words of 8 bits each
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